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參數(shù)資料
| 型號(hào)： | ADL5372ACPZ-R2 |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 調(diào)制器/解調(diào)器 |
| 英文描述： | 1500 MHz - 2500 MHz RF/MICROWAVE QUADRAPHASE MODULATOR |
| 封裝： | LEAD FREE, MO-220VGGD-2, LFCSP-24 |
| 文件頁數(shù)： | 8/24頁 |
| 文件大?。?/td> | 802K |
| 代理商： | ADL5372ACPZ-R2 |
ADL5372
Rev. 0 | Page 16 of 24
WCDMA OPERATION
The ADL5372 is suitable for operation in a WCDMA
environment, providing better than 72.5 dB of adjacent channel
power ratio (ACPR) at an output power of 10 dBm, with a
show the ACPR and 20 MHz offset noise floor of the ADL5372
vs. the output power at LO frequencies of 1966 MHz and
2140 MHz, respectively.
06
51
1-
0
34
POUT (dBm)
AD
JA
CE
NT
AN
D
AL
T
E
RNAT
E
CHANNE
L
P
O
W
E
R
RAT
IO
S
(
d
B)
–14
–13
–12
–11
–10
–9
–8
–7
20M
Hz
O
F
S
E
T
NO
IS
E
F
L
O
R
(
d
Bm/
H
z)
ADJACENT CPR
ALTERNATE CPR
20MHz NOISE FLOOR
–82
–80
–78
–76
–74
–72
–70
–158.5
–158.0
–157.5
–157.0
–156.5
–156.0
–155.5
Figure 36. WCDMA Adjacent and Alternate Channel Power ratios and
20 MHz Offset Noise Floor vs. Output Power at 1966 MHz; LO Power = 0 dBm
06
51
1-
0
35
POUT (dBm)
A
DJACE
NT
AND
AL
T
E
RNAT
E
CHA
NNE
L
P
O
W
E
R
RA
T
IO
S
(d
B)
–14
–13
–12
–11
–10
–9
–8
–7
20
M
H
zO
F
SET
N
O
ISE
F
L
O
R
(
d
B
m
/H
z)
ADJACENT CPR
ALTERNATE CPR
20MHz NOISE FLOOR
–82
–80
–78
–76
–74
–72
–70
–158.5
–158.0
–157.5
–157.0
–156.5
–156.0
–155.5
Figure 37. WCDMA Adjacent and Alternate Channel Power and 20 MHz
Offset Noise Floor vs. Output Power at 2140 MHz; LO Power = 0 dBm
WiMAX OPERATION
Figure 38 demonstrates the ACPR vs. the output power for the
ADL5372 at 2350 MHz. The following test conditions were
applied: a 10 MHz wide 64-QAM OFDM signal with 256
subcarriers, and a raised cosine filter with an α = 0.2.
06
51
1-
0
46
OUTPUT POWER (dBm)
ACP
R
(
d
B)
–72
–58
–16
–14
–12
–10
–8
–6
–4
–2
–160
–153
70
M
H
zOFF
S
E
T
N
OIS
E
F
L
OO
R
(d
B
m
/H
z)
–70
–68
–66
–64
–62
–60
–159
–158
–157
–156
–155
–154
ACPR
70MHz OFFSET NOISE FLOOR
Figure 38. WiMAX ACPR and Noise Floor vs. Output Power at 2350 MHz;
LO Power = 0 dBm
LO GENERATION USING PLLS
Analog Devices has a line of PLLs that can be used for generating
the LO signal. Table 4 lists the PLLs together with their maximum
frequency and phase noise performance.
Table 4. Analog Devices PLL Selection Table
Part
Frequency FIN (MHz)
Phase Noise @ 1 kHz Offset
and 200 kHz PFD (dBc/Hz)
ADF4110
550
91 @ 540 MHz
ADF4111
1200
87 @ 900 MHz
ADF4112
3000
90 @ 900 MHz
ADF4113
4000
91 @ 900 MHz
ADF4116
550
89 @ 540 MHz
ADF4117
1200
87 @ 900 MHz
ADF4118
3000
90 @ 900 MHz
The ADF4360 comes as a family of chips, with nine operating
frequency ranges. One is chosen, depending on the local
oscillator frequency required. While the use of the integrated
synthesizer may come at the expense of slightly degraded noise
performance from the ADL5372, it can be a cheaper alternative
to a separate PLL and VCO solution. Table 5 shows the options
available.
Table 5. ADF4360 Family Operating Frequencies
Part
Output Frequency Range (MHz)
ADF4360-0
2400 to 2725
ADF4360-1
2050 to 2450
ADF4360-2
1850 to 2150
ADF4360-3
1600 to 1950
ADF4360-4
1450 to 1750
ADF4360-5
1200 to 1400
ADF4360-6
1050 to 1250
ADF4360-7
350 to 1800
ADF4360-8
65 to 400
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