V
參數(shù)資料
型號(hào): ADG5204BRUZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 20/20頁(yè)
文件大?。?/td> 0K
描述: MUX 4CH LATCH-UP PROOF 14TSSOP
標(biāo)準(zhǔn)包裝: 96
功能: 多路復(fù)用器
電路: 1 x 4:1
導(dǎo)通狀態(tài)電阻: 170 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 9 V ~ 40 V,±9 V ~ ±22 V
電流 - 電源: 85µA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
ADG5204
Rev. 0 | Page 9 of 20
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
ADG5204
NC = NO CONNECT
1
2
3
4
5
6
7
EN
VSS
S1
NC
D
S2
A0
14
13
12
11
10
9
8
GND
VDD
S3
NC
S4
A1
TOP VIEW
(Not to Scale)
09
76
8-
0
02
Figure 2. TSSOP Pin Configuration
NOTES
1. NC = NO CONNECT.
2. EXPOSED PAD TIED TO SUBSTRATE, VSS.
1
VSS
2
NC
3
S1
4
S2
11 VDD
12 GND
10 S3
9S4
5
N
C
6
D
7
N
C
8
N
C
15
A
0
16
E
N
14
A
1
13
N
C
TOP VIEW
(Not to Scale)
ADG5204
09
76
8-
0
03
Figure 3. LFCSP Pin Configuration
Table 7. Pin Function Descriptions
Pin No.
TSSOP
LFCSP
Mnemonic
Description
1
15
A0
Logic Control Input.
2
16
EN
Active High Digital Input. When this pin is low, the device is disabled and all switches are off.
When this pin is high, the Ax logic inputs determine the on switches.
3
1
VSS
Most Negative Power Supply Potential.
4
3
S1
Source Terminal. Can be an input or an output.
5
4
S2
Source Terminal. Can be an input or an output.
6
D
Drain Terminal. Can be an input or an output.
7 to 9
2, 5, 7, 8, 13
NC
No Connect. These pins are open.
10
9
S4
Source Terminal. Can be an input or an output.
11
10
S3
Source Terminal. Can be an input or an output.
12
11
VDD
Most Positive Power Supply Potential.
13
12
GND
Ground (0 V) Reference.
14
A1
Logic Control Input.
EP
Exposed Pad
Exposed Pad. The exposed pad is connected internally. For increased reliability of the solder
joints and maximum thermal capability, it is recommended that the pad be soldered to the
substrate, VSS.
1 N/A means not applicable.
TRUTH TABLE
Table 8.
EN
A0
S1
S2
S3
S4
0
Off
1
0
On
Off
1
0
1
Off
On
Off
1
0
Off
On
Off
1
Off
On
1 X is don’t care.
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