參數(shù)資料
型號: ADG5204BRUZ
廠商: Analog Devices Inc
文件頁數(shù): 1/20頁
文件大?。?/td> 0K
描述: MUX 4CH LATCH-UP PROOF 14TSSOP
標(biāo)準(zhǔn)包裝: 96
功能: 多路復(fù)用器
電路: 1 x 4:1
導(dǎo)通狀態(tài)電阻: 170 歐姆
電壓電源: 單/雙電源
電壓 - 電源,單路/雙路(±): 9 V ~ 40 V,±9 V ~ ±22 V
電流 - 電源: 85µA
工作溫度: -40°C ~ 125°C
安裝類型: 表面貼裝
封裝/外殼: 14-TSSOP(0.173",4.40mm 寬)
供應(yīng)商設(shè)備封裝: 14-TSSOP
包裝: 管件
High Voltage, Latch-Up Proof,
4-Channel Multiplexer
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityis assumedbyAnalogDevicesforitsuse,norforanyinfringements of patents or other
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
2011 Analog Devices, Inc. All rights reserved.
FEATURES
Latch-up proof
3 pF off source capacitance
26 pF off drain capacitance
0.6 pC charge injection
Low leakage: 0.4 nA maximum at 85°C
±9 V to ±22 V dual-supply operation
9 V to 40 V single-supply operation
48 V supply maximum ratings
Fully specified at ±15 V, ±20 V, +12 V, and +36 V
VSS to VDD analog signal range
APPLICATIONS
Automatic test equipment
Data acquisition
Instrumentation
Avionics
Audio and video switching
Communication systems
FUNCTIONAL BLOCK DIAGRAM
S1
1 OF 4
DECODERS
S2
D
S3
S4
A0
A1
EN
09
76
8-
00
1
Figure 1.
GENERAL DESCRIPTION
The ADG5204 is a complementary metal oxide semiconductor
(CMOS) analog multiplexer, comprising four single channels.
The ultralow capacitance and charge injection of these switches
make them ideal solutions for data acquisition and sample-and-
hold applications, where low glitch and fast settling are required.
Fast switching speed together with high signal bandwidth make
the ADG5204 suitable for video signal switching.
The ADG5204 is designed on a trench process, which guards
against latch-up. A dielectric trench separates the P and N
channel transistors, thereby preventing latch-up even under
severe overvoltage conditions.
The ADG5204 switches one of four inputs to a common output,
D, as determined by the 3-bit binary address lines, A0, A1, and
EN. Logic 0 on the EN pin disables the device. Each switch con-
ducts equally well in both directions when on, and each switch
has an input signal range that extends to the supplies. In the off
condition, signal levels up to the supplies are blocked. All switches
exhibit break-before-make switching action.
PRODUCT HIGHLIGHTS
1.
Trench Isolation Guards Against Latch-Up.
A dielectric trench separates the P and N channel transistors,
thereby preventing latch-up even under severe overvoltage
conditions.
2.
Ultralow Capacitance and <1 pC Charge Injection.
3.
Dual-Supply Operation.
For applications where the analog signal is bipolar, the
ADG5204 can be operated from dual supplies up to ±22 V.
4.
Single-Supply Operation.
For applications where the analog signal is unipolar, the
ADG5204 can be operated from a single rail power supply
up to 40 V.
5.
3 V Logic-Compatible Digital Inputs.
VINH = 2.0 V, VINL = 0.8 V.
6.
No VL Logic Power Supply Required.
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