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參數(shù)資料
| 型號： | ADF4212LBRUZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 16/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL FREQ SYNTHESIZER 20TSSOP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 類型： | 時鐘/頻率合成器（RF/IF） |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | 時鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.4GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.7 V ~ 3.3 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-TSSOP（0.173"，4.40mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 20-TSSOP |
| 包裝： | 帶卷 (TR) |
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Data Sheet
ADF4212L
Rev. E | Page 23 of 28
WIDEBAND PLL
Many of the wireless applications for synthesizers and VCOs in
PLLs are narrow band in nature. These applications include the
various wireless standards such as GSM, DSC1800, CDMA, or
WCDMA. In each of these cases, the total tuning range for the
LO is less than 100 MHz. However, there are also wideband
applications where the LO can have up to an octave tuning
range. For example, cable television tuners have a total range
of about 400 MHz. Figure 32 shows an application where the
ADF4212L is used to control and program the Micronetics
M3500-1324. The loop filter was designed for an RF output of
2100 MHz, a loop bandwidth of 40 kHz, a PFD frequency of 1
MHz, ICP of 10 mA (2.5 mA synthesizer ICP multiplied by the gain
factor of 4), VCO KD of 80 MHz/V (sensitivity of the M3500-1324
at an output of 2100 MHz), and a phase margin of 45 degrees.
In narrow-band applications, there is generally a small variation
in output frequency (generally less than 10%) and a small variation
in VCO sensitivity over the range (typically <10%). However, in
wideband applications, both of these parameters have a much
greater variation, which changes the loop bandwidth. This, in turn,
can affect stability and lock time. By changing the programma-
ble ICP, it is possible to obtain compensation for these varying loop
conditions and to ensure that the loop is always operating close
to optimal conditions.
AD820
SPI-COMPATIBLE SERIAL BUS
LOCK
DETECT
VCC
DG
ND
RF
AG
ND
RF
DG
ND
IF
AG
ND
IF
CLK
DATA
LE
RFIN
RFOUT
MUXOUT
CPRF
VP2
VP1
ADF4212L
100pF
1000pF
51
18
REFIN
FREFIN
RSET
3.9nF
27nF
12V
130pF
100pF
470
51
GND
V_TUNE
OUT
M3500-1324
2.7k
20k
20V
3k
1k
VDD2
VP
VDD
VDD1
02774-
037
DECOUPLING CAPACITORS ON VDDx AND VPx OF THE ADF4212L, ON +VS OF THE AD820,
AND ON VCC OF THE M3500-1324 HAVE BEEN OMITTED FROM THE DIAGRAM TO AID CLARITY.
THE IF SECTION OF THE CIRCUIT HAS ALSO BEEN OMITTED TO SIMPLIFY THE SCHEMATIC.
Figure 32. Wideband PLL Circuit
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| ADF4213BCP | 制造商:Rochester Electronics LLC 功能描述:DUAL PLL 2.5/1.1 GHZ - Bulk 制造商:Analog Devices 功能描述: |
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| ADF4213BCPZ-RL | 功能描述:IC PLL FREQ SYNTHESIZER 20LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 產(chǎn)品變化通告:Product Discontinuation 04/May/2011 標(biāo)準(zhǔn)包裝:96 系列:- 類型:時鐘倍頻器，零延遲緩沖器 PLL:帶旁路 輸入:LVTTL 輸出:LVTTL 電路數(shù):1 比率 - 輸入:輸出:1:8 差分 - 輸入:輸出:無/無 頻率 - 最大:133.3MHz 除法器/乘法器:是/無 電源電壓:3 V ~ 3.6 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:16-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:16-TSSOP 包裝:管件 其它名稱:23S08-5HPGG |
| ADF4213BCPZ-RL7 | 制造商:Analog Devices 功能描述:PLL Frequency Synthesizer Dual 20-Pin LFCSP EP T/R |
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