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參數(shù)資料
型號: ADF4212LBCPZ-RL
廠商: Analog Devices Inc
文件頁數(shù): 27/28頁
文件大?。?/td> 0K
描述: IC PLL FREQ SYNTHESIZER 20LFCSP
標(biāo)準(zhǔn)包裝: 5,000
類型: 時(shí)鐘/頻率合成器(RF/IF)
PLL:
輸入: CMOS,TTL
輸出: 時(shí)鐘
電路數(shù): 1
比率 - 輸入:輸出: 3:1
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.4GHz
除法器/乘法器: 是/無
電源電壓: 2.7 V ~ 3.3 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 20-LFCSP-VQ
包裝: 帶卷 (TR)
ADF4212L
Data Sheet
Rev. E | Page 8 of 28
Pin No.
Mnemonic
TSSOP
LFCSP
Description
VDD2
20
18
Power Supply for the IF, Digital, and Interface Section. Decoupling capacitors to the ground plane
should be placed as close as possible to this pin. VDD2 should have a value of between 2.6 V and 3.3 V.
VDD2 must have the same potential as VDD1.
VDD1
1
19
Power Supply for the RF Section. Decoupling capacitors to the ground plane should be placed as close
as possible to this pin. VDD1 should have a value of between 2.6 V and 3.3 V. VDD1 must have the same
potential as VDD2.
VP1
2
20
Power Supply for the RF Charge Pump. This should be greater than or equal to VDD1. In systems where
VDD1 is 3 V, it can be set to 5.5 V and used to drive a VCO with a tuning range up to 5.5 V.
EP
Exposed
Pad
It is recommended that the exposed pad be thermally connected to a copper plane for enhanced
thermal performance. The pad should be grounded as well.
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