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參數(shù)資料
| 型號(hào)： | ADF4212LBCPZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 26/28頁 |
| 文件大小： | 0K |
| 描述： | IC PLL FREQ SYNTHESIZER 20LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1,500 |
| 類型： | 時(shí)鐘/頻率合成器（RF/IF） |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | 時(shí)鐘 |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:1 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 2.4GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.7 V ~ 3.3 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 20-LFCSP-VQ |
| 包裝： | 帶卷 (TR) |
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Data Sheet
ADF4212L
Rev. E | Page 7 of 28
PIN CONFIGURATIONS AND FUNCTION DESCRIPTIONS
1
2
3
4
5
6
7
8
9
10
VP1
CPRF
DGNDRF
FLO
AGNDRF
RFIN
VDD1
MUXOUT
DGNDIF
REFIN
20
19
18
17
16
15
14
13
12
11
VP2
CPIF
DGNDIF
RSET
AGNDIF
IFIN
CLK
DATA
LE
VDD2
ADF4212L
TOP VIEW
(Not to Scale)
0
27
74
-0
03
Figure 3. TSSOP Pin Configuration
CPRF
DGNDRF
RFIN
AGNDRF
FLO
NOTES
1. IT IS RECOMMENDED THAT THE EXPOSED PAD
BE THERMALLY CONNECTED TO A COPPER PLANE
FOR ENHANCED THERMAL PERFORMANCE. THE PAD
SHOULD BE GROUNDED AS WELL.
AGNDIF
IFIN
DGNDIF
RSET
LE
R
E
F
IN
D
G
N
D
IF
M
U
X
O
U
T
D
A
T
A
C
L
K
V
D
2
V
D
1
V
P
1
V
P
2
C
P
IF
0
277
4-
00
4
14
13
12
1
3
4
15
11
2
5
7
6
8
9
1
0
1
9
2
0
1
8
1
7
1
6
TOP
VIEW
ADF4212L
Figure 4. LFCSP Pin Configuration
Table 5. Pin Function Descriptions
Pin No.
Mnemonic
TSSOP
LFCSP
Description
CPRF
3
1
RF Charge Pump Output. When enabled, this provides ±ICP to the external RF loop filter, which in turn
drives the external RF VCO.
DGNDRF
4
2
Digital Ground Pin for the RF Digital Circuitry.
RFIN
5
3
Input to the RF Prescaler. This small signal input is normally ac-coupled from the RF VCO.
AGNDRF
6
4
Ground Pin for the RF Analog Circuitry.
FLO
7
5
Multiplexed Output of RF/IF Programmable or Reference Dividers, RF/IF Fastlock Mode. CMOS output.
REFIN
8
6
Reference Input. This is a CMOS input with a nominal threshold of VDD/2 and an equivalent input
resistance of 100 kΩ. See Figure 26. This input can be driven from a TTL or CMOS crystal oscillator, or can
be ac-coupled.
DGNDIF
9, 17
7, 15
Digital Ground Pin for the IF Digital, Interface, and Control Circuitry.
MUXOUT
10
8
This multiplexer output allows either the IF/RF lock detect, the scaled RF, the scaled IF, or the scaled
reference frequency to be accessed externally.
CLK
11
9
Serial Clock Input. This serial clock is used to clock in the serial data to the registers. The data is latched
into the 24-bit shift register on the CLK rising edge. This input is a high impedance CMOS input.
DATA
12
10
Serial Data Input. The serial data is loaded MSB first with the two LSBs being the control bits. This input is
a high impedance CMOS input.
LE
13
11
Load Enable, CMOS Input. When LE goes high, the data stored in the shift registers is loaded into one of
the four latches, with the latch selected using the control bits.
RSET
14
12
Connecting a resistor between this pin and ground sets the maximum RF and IF charge pump output
current. The nominal voltage potential at the RSET pin is 0.66 V. The relationship between ICP and RSET is,
therefore,
SET
MAX
CP
R
I
13.5
where RSET = 2.7 kΩ and ICP MAX = 5 mA for both the RF and IF charge pumps.
AGNDIF
15
13
Ground Pin for the IF Analog Circuitry.
IFIN
16
14
Input to the IF Prescaler. This small signal input is normally ac-coupled from the IF VCO.
CPIF
18
16
Output from the IF Charge Pump. This is normally connected to a loop filter that drives the input to an
external VCO.
VP2
19
17
Power Supply for the IF Charge Pump. This should be greater than or equal to VDD2. In systems where
VDD2 is 3 V, it can be set to 5.5 V and used to drive a VCO with a tuning range up to 5.5 V.
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| ADF4212LBRUZ | 功能描述:IC PLL FREQ SYNTHESIZER 20TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
| ADF4212LBRUZ-RL | 功能描述:IC PLL FREQ SYNTHESIZER 20TSSOP RoHS:是 類別:集成電路 (IC) >> 時(shí)鐘/計(jì)時(shí) - 時(shí)鐘發(fā)生器，PLL，頻率合成器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:Precision Edge® 類型:時(shí)鐘/頻率合成器 PLL:無 輸入:CML，PECL 輸出:CML 電路數(shù):1 比率 - 輸入:輸出:2:1 差分 - 輸入:輸出:是/是 頻率 - 最大:10.7GHz 除法器/乘法器:無/無 電源電壓:2.375 V ~ 3.6 V 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:16-VFQFN 裸露焊盤，16-MLF? 供應(yīng)商設(shè)備封裝:16-MLF?（3x3） 包裝:帶卷 (TR) 其它名稱:SY58052UMGTRSY58052UMGTR-ND |
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