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參數資料
| 型號： | ADF4118BRUZ-RL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數： | 23/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PLL RF FREQ SYNTHESZR 16TSSOP |
| 標準包裝： | 1,000 |
| 類型： | 時鐘/頻率合成器，RF |
| PLL： | 是 |
| 輸入： | CMOS，TTL |
| 輸出： | 時鐘 |
| 電路數： | 1 |
| 比率 - 輸入:輸出： | 2:1 |
| 差分 - 輸入:輸出： | 是/無 |
| 頻率 - 最大： | 3GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 2.7 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-TSSOP（0.173"，4.40mm 寬） |
| 供應商設備封裝： | 16-TSSOP |
| 包裝： | 帶卷 (TR) |
| 配用： | EVAL-ADF4118EBZ1-ND - BOARD EVAL FOR ADF4118 |
| 其它名稱： | ADF4118BRUZ-RL7-ND ADF4118BRUZ-RL7TR |
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ADF4116/ADF4117/ADF4118
Rev. D | Page 4 of 28
Parameter
B Version1
Y Version2
Unit
Test Conditions/Comments
POWER SUPPLIES
AVDD
2.7 to 5.5
V min to V max
DVDD
AVDD
VP
AVDD to 6.0
V min to V max
AVDD ≤ VP ≤ 6.0 V
ADF4116
5.5
mA max
4.5 mA typical
ADF4117
5.5
mA max
4.5 mA typical
ADF4118
7.5
mA max
6.5 mA typical
IP
0.4
mA max
TA = 25°C
Low-Power Sleep Mode
1
μA typ
NOISE CHARACTERISTICS
ADF4118 Normalized Phase Noise
Floor7
213
dBc/Hz typ
Phase Noise Performance8
@ VCO output
ADF4116 540 MHz Output9
89
dBc/Hz typ
@ 1 kHz offset and 200 kHz PFD frequency
ADF4117 900 MHz Output10
87
dBc/Hz typ
@ 1 kHz offset and 200 kHz PFD frequency
ADF4118 900 MHz Output10
90
dBc/Hz typ
@ 1 kHz offset and 200 kHz PFD frequency
ADF4117 836 MHz Output11
78
dBc/Hz typ
@ 300 Hz offset and 30 kHz PFD frequency
ADF4118 1750 MHz Output12
85
dBc/Hz typ
@ 1 kHz offset and 200 kHz PFD frequency
ADF4118 1750 MHz Output13
65
dBc/Hz typ
@ 200 Hz offset and 10 kHz PFD frequency
ADF4118 1960 MHz Output14
84
dBc/Hz typ
@ 1 kHz offset and 200 kHz PFD frequency
Spurious Signals
ADF4116 540 MHz Output10
88/99
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4117 900 MHz Output10
90/104
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4118 900 MHz Output 10
91/100
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4117 836 MHz Output11
80/84
dBc typ
@ 30 kHz/60 kHz and 30 kHz PFD frequency
ADF4118 1750 MHz Output12
88/90
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD frequency
ADF4118 1750 MHz Output13
65/73
dBc typ
@ 10 kHz/20 kHz and 10 kHz PFD frequency
ADF4118 1960 MHz Output14
80/86
dBc typ
@ 200 kHz/400 kHz and 200 kHz PFD frequency
1 Operating temperature range for the B version is 40°C to +85°C.
2 Operating temperature range for the Y version is 40°C to +125°C.
3 This is the maximum operating frequency of the CMOS counters.
5 Guaranteed by design.
6 TA = 25°C; AVDD = DVDD = 3 V; RFIN for ADF4116 = 540 MHz; RFIN for ADF4117, ADF4118 = 900 MHz.
7 The synthesizer phase noise floor is estimated by measuring the in-band phase noise at the output of the VCO, PNTOT, and subtracting 20logN (where N is the N
divider value) and 10logFPFD: PNSYNTH = PNTOT – 10logFPFD – 20logN.
8 The phase noise is measured with the EVAL-ADF411xEB and the HP8562E Spectrum Analyzer. The spectrum analyzer provides the REFIN for the synthesizer
(fREFOUT = 10 MHz @ 0 dBm).
9 fREFIN = 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 540 MHz; N = 2700; loop bandwidth = 20 kHz.
10 fREFIN = 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 900 MHz; N = 4500; loop bandwidth = 20 kHz.
11 fREFIN = 10 MHz; fPFD = 30 kHz; offset frequency = 300 Hz; fRF = 836 MHz; N = 27867; loop bandwidth = 3 kHz.
12 fREFIN = 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 1750 MHz; N = 8750; loop bandwidth = 20 kHz.
13 fREFIN = 10 MHz; fPFD = 10 kHz; offset frequency = 200 Hz; fRF = 1750 MHz; N = 175000; loop bandwidth = 1 kHz.
14 fREFIN = 10 MHz; fPFD = 200 kHz; offset frequency = 1 kHz; fRF = 1960 MHz; N = 9800; loop bandwidth = 20 kHz.
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