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參數(shù)資料
| 型號(hào)： | ADC12041CIV |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | ADC |
| 英文描述： | 12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter |
| 中文描述： | 1-CH 13-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC28 |
| 封裝： | PLASTIC, LCC-28 |
| 文件頁(yè)數(shù)： | 6/28頁(yè) |
| 文件大?。?/td> | 591K |
| 代理商： | ADC12041CIV |
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Digital Logic Input/Output Characteristics
(Continued)
The following specifications apply to the ADC12041 for V
+ = V
+ = 5V, V
+ = 4.096V, V
= 0.0V, 12-bit + sign con-
version mode, f
= 12.0 MHz, R
= 25
, source impedance for V
+ and V
≤
1
, fully differential input with fixed
2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= 25C
Symbol
Parameter
Conditions
Typical
(Note 10)
Limits
(Note 11)
Unit
(Limit)
V
OL
Logic Low Output Voltage
V
A
+ = V
D
+ = 4.5V
I
OUT
= 1.6 mA
V
OUT
= 0V
V
OUT
=5V
0.4
0.4
V (max)
I
OFF
TRI-STATE Output Leakage Current
±
2.0
μA (max)
C
IN
D12–D0 Input Capacitance
10
pF
Converter AC Characteristics
The following specifications apply to the ADC12041 for V
+ = V
+ = 5V, V
+ = 4.096V, V
= 0.0V, 12-bit + sign con-
version mode, f
= 12.0 MHz, R
= 25
, source impedance for V
+ and V
≤
1
, fully differential input with fixed
2.048V common-mode voltage, and minimum acquisition time, unless otherwise specified.
Boldface limits apply for T
A
= T
J
= T
MIN
to T
MAX
;
all other limits T
A
= T
J
= 25C
Symbol
Parameter
Conditions
Typical
(Note 10)
78
4946
50
Limits
(Note 11)
78 clks + 120 ns
4946 clks + 120 ns
Unit
(Limit)
clks (max)
clks (max)
%
% (min)
% (max)
clks (max)
clks (max)
clks (max)
t
Z
t
CAL
Auto Zero Time
Full Calibration Time
CLK Duty Cycle
40
60
44
t
CONV
t
AcqSYNCOUT
Conversion Time
Acquisition Time
(Programmable)
Sync-Out Mode
Minimum for 13 Bits
Maximum for 13 Bits
44
9
79
9 clks + 120 ns
79 clks + 120 ns
Digital Timing Characteristics
The following specifications apply to the ADC12041, 13-bit data bus width, V
A
+ = V
D
+ = 5V, f
CLK
= 12 MHz, t
f
= 3 ns and C
L
= 50 pF on data I/O lines
Symbol
Parameter
Conditions
Typical
(Note 10)
222
Limits
(Note 11)
Unit
(Limit)
kHz
t
TPR
Throughput Rate
Sync-Out Mode (SYNC Bit = “0”)
9 Clock Cycles of Acquisition Time
t
CSWR
Falling Edge of CS
to Falling Edge of WR
Active Edge of WR
to Rising Edge of CS
WR Pulse Width
Write Setup Time
Write Hold Time
Write Setup Time
Write Hold Time
Falling Edge of CS to Falling
Edge of RD
0
ns
t
WRCS
0
ns
t
WR
t
WRSETFalling
t
WRHOLDFalling
t
WRSETRising
t
WRHOLDRising
t
CSRD
20
30
20
5
20
5
ns (min)
ns (min)
ns (min)
ns (min)
ns (min)
ns
WMODE = “1”
WMODE = “1”
WMODE = “0”
WMODE = “0”
0
t
RDCS
Rising Edge of RD
to Rising Edge of CS
Falling Edge of RD to Valid Data
Falling Edge of RD to Valid Data
Read Hold Time
0
ns
t
RDDATA
t
RDDATA
t
RDHOLD
8-Bit Mode (BW Bit = “0”)
13-Bit Mode (BW Bit = “1”)
40
26
23
58
44
32
ns (max)
ns (max)
ns (max)
A
www.national.com
6
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADC12041CIVX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter |
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| ADC12048CIV | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADC12048CIV/NOPB | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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