參數(shù)資料
型號： ADC12041CIV
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： ADC
英文描述： 12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter
中文描述： 1-CH 13-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, PQCC28
封裝： PLASTIC, LCC-28
文件頁數(shù)： 20/28頁
文件大?。?/td> 591K
代理商： ADC12041CIV
Register Bit Description
(Continued)
b
–b
:
The ACQ TIME bits select one of four possible acquistion times in the SYNC-OUT mode (b
4
= 0). (Refer to
Selectable
Acquisition Time
section, page 22).
b
1
0
0
1
1
b
0
0
1
0
1
Clocks
9
15
47
79
b
:
When the Single-Ended bit (SE bit) is a ’1’, conversion results will be limited to positive values only and any negative conver-
sion results will appear as a code of zero in the Data register. The SE bit is cleared at
power-up
.
b
3
:
This is the Bus Width (BW) bit. When this bit is a ’0’ the ADC12041 is configured to interface with an 8-bit data bus; data pins
D
–D
are active and pins D
–D
9
are in TRI-STATE. When the BW bit is a ’1’, the ADC12041 is configured to interface with a
16-bit data bus and data pins D
12
–D
0
are all active. The BW bit is cleared at
power-up
.
b
:
The SYNC bit. When the SYNC bit is a ’1’, the SYNC pin is programmed as an input and the converter is in synchronous
mode. In this mode a rising edge on the SYNC pin causes the ADC to hold the input signal and begin a conversion. When b
is
a ’0’, the SYNC pin is programmed as an output and the converter is in an asynchronous mode. In this mode the signal at the
SYNC pin indicates the status of the converter. The SYNC pin is high when a conversion is taking place. The SYNC bit is set at
power-up
.
b
7
–b
5
:
The command field. These bits select the mode of operation of the ADC12041.
Power-up
value is 000. (See Note 22)
b
7
0
0
b
6
0
0
b
5
0
1
Command
Standby command. This puts the ADC in a low power consumption mode.
Ful-Cal command. This will cause the ADC to perform a self-calibrating cycle that will correct linearity and zero
errors.
Auto-zero command. This will cause the ADC to perform an auto-zero cycle that corrects offset errors.
Reset command. This puts the ADC in an idle mode.
Start command. This will put the converter in a start mode, preparing it to perform a conversion. If in
asynchronous mode (b
4
= “0”), conversions will immediately begin after the programmed acquisition time has
ended. In synchronous mode (b
4
= “1”), conversions will begin after a rising edge appears on the SYNC pin.
0
0
1
1
1
0
0
1
0
DATA REGISTER (Read Only)
This is a 13-bit read only register that holds the 12-bit + sign conversion result in two’s complement form.All reads performed from
the ADC12041 will place the contents of this register on the data bus. When reading the data register in 8-bit mode, the sign bit
is extended.
MSB
b
12
sign
LSB
b
0
b
11
b
10
b
9
b
8
b
7
b
6
b
5
b
4
b
3
b
2
b
1
Conversion Data
Power on State:
0000Hex
b
11
–b
0
:
b
11
is the most significant bit and b
0
is the least significant bit of the conversion result.
b
12
:
This bit contains the sign of the conversion result. 0 for positive results and 1 for negative.
Functional Description
The ADC12041 is programmed through a digital interface
that supports an 8-bit or 16-bit data bus. The digital interface
consists of a 13-bit data input/output bus (D
–D
), digital
control signals and two internal registers: a write only 8-bit
Configuration register and a read only 13-bit Data register.
The Configuration register programs the functionality of the
ADC12041. The 8 bits of the Configuration register are di-
vided into 5 fields. Each field controls a specific function of
the ADC12041: the acquisition time, synchronous or asyn-
chronous conversions, mode of operation and the data bus
size.
Features and Operating Modes
SELECTABLE BUS WIDTH
TheADC12041 can be programmed to interface with an 8-bit
or 16-bit data bus. The BW bit (b
) in the Configuration reg-
ister controls the bus size. The bus width is set to 8 bits
(D
–D
are active and D
–D
8
are in TRI-STATE) if the BW
bit is cleared or 13 bits (D
–D
are active) if the BW bit is
set. At power-up the default bus width is 8 bits (BW = 0).
In 8-bit mode the Configuration register is accessed with a
single write. When reading the ADC in 8-bit mode, the first
read cycle places the lower byte of the Data register on the
data bus followed by the upper byte during the next read
cycle.
In 13-bit mode all bits of the Data register and Configuration
register are accessible with a single read or write cycle.
A
www.national.com
20
相關PDF資料
PDF描述
ADC12041CIMSA NiCd/NiMH/Lead-Acid Gas Gauge For High Discharge Rates (>10A), Pgmable Offset Error & Load Comp. 16-SOIC 0 to 70
ADC12048EVAL 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter
ADC12048CIVF 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter
ADC12048 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter
ADC12048CIV 12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter
相關代理商/技術參數(shù)
參數(shù)描述
ADC12041CIVX 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216 kHz Sampling Analog-to-Digital Converter
ADC12048 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216 kHz 8-Channel Sampling Analog-to-Digital Converter
ADC12048_02 制造商:NSC 制造商全稱:National Semiconductor 功能描述:12-Bit Plus Sign 216kHz 8-Channel Sampling Analog-to-Digital Converter
ADC12048CIV 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
ADC12048CIV/NOPB 功能描述:模數(shù)轉換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結構:Sigma-Delta 轉換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-32
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*