參數(shù)資料
型號(hào): ADC10321
廠商: National Semiconductor Corporation
英文描述: 10-Bit, 20MSPS, 98mW A/D Converter with Internal Sample and Hold(10位20MSPS, 98 mW帶內(nèi)部采樣和保持功能A/D轉(zhuǎn)換器)
中文描述: 10位,20MSPS,98mW的A / D轉(zhuǎn)換器內(nèi)部采樣和保持(10位20MSPS,98毫瓦帶內(nèi)部采樣和保持功能的A / D轉(zhuǎn)換器)
文件頁(yè)數(shù): 11/16頁(yè)
文件大?。?/td> 395K
代理商: ADC10321
Applications Information
1.0 THE ANALOG INPUT
The analog input of the ADC10321 is a switch (transmission
gate) followed by a switched capacitor amplifier. The capaci-
tance seen at the input changes with the clock level, appear-
ing as about 3pF when the clock is low, and about 5pF when
the clock is high. This small change in capacitance can be
reasonably assumed to be a fixed capacitance. Care should
be taken to avoid driving the input beyond the supply rails,
even momentarily, as during power-up.
The CLC409 has been found to be a good device to drive the
ADC10321 because of its low voltage capability, wide band-
width, low distortion and minimal Differential Gain and Dif-
ferential Phase. The CLC409 performs best with a feedback
resistor of about 100 ohms.
Care should be taken to keep digital noise out of the analog
input circuitry to maintain highest noise performance.
2.0 REFERENCE INPUTS
Note:
Throughout this data sheet reference is made to
V
+ and to V
. These refer to the internal voltage
across the reference ladder and are, nominally, V
REF
+ S and
V
REF
S, respectively.
Figure 4 shows a simple reference biasing scheme with
minimal components. While this circuit might suffice for
some applications, it does suffer from thermal drift because
the external resistor at pin 2 will have a different temperature
coefficient than the on-chip resistors. Also, the on-chip resis-
tors, while well matched to each other, will have a large
tolerance compared with any external resistors, causing the
value of V
REF
- to be quite variable. No d.c. current should be
allowed to flow through pin 1 or 32 or linearity errors will
result near the zero scale and full scale ends of the signal
excursion. The sense pins were designed to be used with
high impedance opamp inputs for high accuracy biasing.
The circuit of Figure 5 is an improvement over the circuit of
Figure 4in that both ends of the reference ladder are defined
with reference voltages. This reduces problems of high ref-
erence variability and thermal drift, but requires two refer-
ence sources.
In addition to the usual reference inputs, the ADC10321 has
two sense outputs for precision control of the ladder volt-
ages. These sense outputs (V
+ S and V
S) compen-
sate for errors due to IR drops between the source of the
reference voltages and the ends of the reference ladder
itself.
With the addition of two op-amps, the voltages at the top and
bottom of the reference ladder can be forced to the exact
value desired, as shown in Figure 6
DS100897-18
FIGURE 4. Simple, low component cournt reference biasing
A
www.national.com
11
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