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參數(shù)資料
| 型號： | ADC101S101EVAL |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 串行ADC |
| 英文描述： | 1MSPS, 12-/10-/8-Bit A/D Converters in SOT-23 |
| 中文描述： | 1MSPS，12/10/8位的A / D轉(zhuǎn)換器采用SOT - 23 |
| 文件頁數(shù)： | 2/13頁 |
| 文件大?。?/td> | 621K |
| 代理商： | ADC101S101EVAL |
Block Diagram
20145507
Pin Descriptions and Equivalent Circuits
Pin No.
ANALOG I/O
3
DIGITAL I/O
4
Symbol
Description
V
IN
Analog inputs. This signal can range from 0V to V
A
.
SCLK
Digital clock input. This clock directly controls the conversion and readout processes.
Digital data output. The output samples are clocked out of this pin on falling edges of
the SCLK pin.
Chip select. On the falling edge of CS, a conversion process begins.
5
SDATA
6
CS
POWER SUPPLY
1
V
A
Positive supply pin. This pin should be connected to a quiet +2.7V to +5.25V source
and bypassed to GND with a 1 μF capacitor and a 0.1 μF monolithic capacitor located
within 1 cm of the power pin.
The ground return for the supply and signals.
2
GND
A
www.national.com
2
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