參數(shù)資料
型號: ADAU1382BCPZ
廠商: ANALOG DEVICES INC
元件分類: 消費家電
英文描述: SPECIALTY CONSUMER CIRCUIT, PQCC32
封裝: 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD2, LFCSP-32
文件頁數(shù): 46/84頁
文件大?。?/td> 1193K
代理商: ADAU1382BCPZ
ADAU1382
Rev. 0 | Page 50 of 84
Register 16398 (0x400E), Record Gain Left PGA
The record gain left PGA control register controls the left channel
input PGA. This register configures the input for either differ-
ential or single-ended signals and sets the left channel input
recording volume.
Bits[7:5], Left Input Gain
These bits set the left channel analog microphone input PGA gain.
Bit 2, Single-Ended Left Input Enable
If this bit is high (enabled), a single-ended input can be input on
the LMIC pin and gained by the PGA. The positive differential
input pin (LMICP) is disabled, and the complementary input of
the PGA is switched to common mode.
Bit 1, Record Path Left Mute
This bit mutes the left channel input PGA.
Bit 0, Left PGA Enable
This bit enables the left channel input PGA
Table 37. Record Gain Left PGA Register
Bits
Description
Default
[7:5]
Left input gain
000
000: 0 dB
001: 6 dB
010: 10 dB
011: 14 dB
100: 17 dB
101: 20 dB
110: 26 dB
111: 32 dB
[4:3]
Reserved
2
Single-ended left input enable
0
0: disabled
1: enabled
1
Record path left mute
0
0: muted
1: unmuted
0
Left PGA enable
0
0: disabled
1: enabled
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