- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄165344 > ADAU1382BCPZ (ANALOG DEVICES INC) SPECIALTY CONSUMER CIRCUIT, PQCC32 PDF資料下載
參數(shù)資料
| 型號(hào)： | ADAU1382BCPZ |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQCC32 |
| 封裝： | 5 X 5 MM, ROHS COMPLIANT, MO-220VHHD2, LFCSP-32 |
| 文件頁數(shù)： | 26/84頁 |
| 文件大?。?/td> | 1193K |
| 代理商： | ADAU1382BCPZ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁當(dāng)前第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁
ADAU1382
Rev. 0 | Page 32 of 84
PLAYBACK SIGNAL PATH
SPP
AOUTL
LEFT PLAYBACK
MIXER
LEFT
DAC
LINE OUT
AMPLIFIER
AOUTR
RIGHT
DAC
LINE OUT
AMPLIFIER
RIGHT PLAYBACK
MIXER
MONO
PLAYBACK
MIXER
MONO
OUTPUT
GAIN
MONO
PLAYBACK
BEEP GAIN
BEEP FROM
RECORD PGA
SPN
LEFT
PLAYBACK
BEEP GAIN
RIGHT
PLAYBACK
BEEP GAIN
–1
MONO OUTPUT
INVERTER
084
27-
03
3
Figure 34. Playback Signal Path Diagram
OUTPUT SIGNAL PATHS
The outputs of the ADAU1382 include a left and right line output
and speaker driver. The beep input signal can be mixed into any
of these outputs, with separate gain control for each path.
DIGITAL-TO-ANALOG CONVERTERS
The ADAU1382 uses two 24-bit Σ-Δ digital-to-analog converters
(DACs) with selectable oversampling rates of 64× or 128×. The
full-scale output of the DACs depends on AVDD1. At 3.3 V, the
full-scale output level is 1.0 V rms.
Digital DAC Volume Control
The DAC output (digital output) volume can be adjusted in
Register 16427 (0x402B), left DAC attenuator, for the left channel
digital volume control and in Register 16428 (0x402C), right
DAC attenuator, for the right channel digital volume control.
De-Emphasis Filter
A de-emphasis filter is used in the DAC path to remove high
frequency noise in an FM system. This filter can be enabled or
disabled in Register 16426 (0x402A), DAC control.
LINE OUTPUTS
The AOUTL and AOUTR pins are the left and right line outputs,
respectively. Both outputs have a line output amplifier that can
be set in the control registers.
The left playback mixer is dedicated to the AOUTL output. This
mixer mixes the left DAC and the beep signal.
Similarly, the right playback mixer mixes the right DAC and the
beep input and is dedicated to the AOUTR output.
SPEAKER OUTPUT
The SPP and SPN pins are the positive and negative speaker
outputs, respectively. Each output has a speaker driver.
The speaker outputs are derived from the mono playback mixer,
which sums the right and left DAC outputs and mixes with the
beep signal. The mixer can be controlled in Register 16415
(0x401F), playback mono mixer control.
The drivers are low noise, Class AB mono amplifiers designed to
drive 8 Ω, 400 mW speakers. The output is differential and does
not require external capacitors. The gain settings for the speaker
drivers can be set in Register 16423 (0x4027), playback speaker
output control. In this register, the drivers can be set for any of
the four gain settings: 0 dB, 2 dB, 4 dB, or 6 dB. Additionally,
the speaker driver can be muted or powered down completely.
For pop and click suppression, an internal precharge sequence with
output gating/enabling occurs after the mono driver is enabled.
The sequence lasts for 8 ms, and then the internal mute signal
rising edge occurs (see Figure 35 for the power-up sequence
timing diagram).
The power-down sequence is essentially the reverse of the start-
up sequence, as depicted in Figure 36.
SPEAKER
OUTPUT
ENABLE
MONO
OUTPUT
MUTE
SPP
SPN
HIGH-Z
VCM
IAVDD2
<1A
1.1mA
2.3mA
2.3mA + SIGNAL
CURRENT
DAC
BEEP
DAC VOLUME MUTED
BEEP VOLUME MUTED
DAC VOLUME
INCREASES
BEEP VOLUME
INCREASES
4ms
0
8427-
034
Figure 35. Speaker Driver Power-Up Sequence
SPEAKER
OUTPUT
ENABLE
MONO
OUTPUT
MUTE
SPP
SPN
IAVDD2
DAC
BEEP
HIGH-Z
VCM
<1A
1.1mA
2.3mA
2.3mA + SIGNAL
CURRENT
DAC VOLUME MUTED
BEEP VOLUME MUTED
DAC VOLUME
DECREASES
BEEP VOLUME
DECREASES
4ms
0
8427
-035
Figure 36. Speaker Driver Power-Down Sequence
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADC-00403-103 | 1-CH 12-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, CDIP32 |
| ADC0831 | A/D Peripherals with Serial Control |
| ADC0831A | A/D Peripherals with Serial Control |
| ADC0831B | A/D Peripherals with Serial Control |
| ADC0832 | A/D Peripherals with Serial Control |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADAU1382BCPZ-R7 | 制造商:Analog Devices 功能描述:STEREO AUDIO CODEC FOR DIG STILL CAM - Tape and Reel 制造商:Analog Devices 功能描述:AUDIO CODEC |
| ADAU1401 | 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs |
| ADAU1401A | 制造商:AD 制造商全稱:Analog Devices 功能描述:SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs |
| ADAU1401AWBSTZ | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
| ADAU1401AWBSTZ-RL | 功能描述:IC AUDIO PROC 28/56BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 線性 - 音頻處理 系列:SigmaDSP® 其它有關(guān)文件:STA321 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:Sound Terminal™ 類型:音頻處理器 應(yīng)用:數(shù)字音頻 安裝類型:表面貼裝 封裝/外殼:64-LQFP 裸露焊盤 供應(yīng)商設(shè)備封裝:64-LQFP EP（10x10） 包裝:Digi-Reel® 其它名稱:497-11050-6 |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。