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| 型號： | ADA4830-2BCPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 7/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP BATT PROTECT DUAL 16LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 220 V/µs |
| -3db帶寬： | 84MHz |
| 電流 - 電源： | 6.8mA |
| 電流 - 輸出 / 通道： | 125mA |
| 電壓 - 電源，單路/雙路(±)： | 2.9 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-WQ（3x3） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | ADA4830-2BCPZ-R7DKR |
ADA4830-1/ADA4830-2
Data Sheet
Rev. C | Page 14 of 22
APPLICATIONS INFORMATION
METHODS OF TRANSMISSION
Pseudo Differential Mode (Unbalanced Source
Termination)
The ADA4830-1 and ADA4830-2 can be operated in a pseudo
differential configuration with an unbalanced input signal. This
allows the receiver to be driven by a single-ended source. Pseudo
differential mode uses a single conductor to carry an unbalanced
signal and connects the negative input terminal to the ground
reference of the source.
Use the positive wire or coaxial center conductor to connect the
source output to the positive input (INP) of the ADA4830-1 or
ADA4830-2. Next, connect the negative wire or coaxial shield from
the negative input (INN) back to a ground reference on the source
printed circuit board (PCB). The input termination should match
the source impedance and be referenced to the remote ground.
An example of this configuration is shown in Figure 30.
INN
INP
ADA4830-1
75
+
75
POSITIVE WIRE
NEGATIVE WIRE
DRIVER PCB
SINGLE-ENDED
AMPLIFIER
10020-
034
Figure 30. Pseudo Differential Mode
Pseudo Differential Mode (Balanced Source Impedance)
Pseudo differential signaling is typically implemented using
unbalanced source termination, as shown in Figure 30. With
this arrangement, however, common-mode signals on the
positive and negative inputs receive different attenuation due to
unbalanced termination at the source. This effectively converts
some of the common-mode signal into differential mode signal,
degrading the overall common-mode rejection of the system.
System common-mode rejection can be improved by balancing
the output impedance of the driver, as shown in Figure 31.
Splitting the source termination resistance evenly between the
hot and cold conductors results in matched attenuation of the
common-mode signals, ensuring maximum rejection.
INN
INP
ADA4830-1
75
+
37.5
37.5
POSITIVE WIRE
NEGATIVE WIRE
DRIVER PCB
10020-
035
SINGLE-ENDED
AMPLIFIER
Figure 31. Pseudo Differential Mode with Balanced Source Impedance
Fully Differential Mode
The differential inputs of the ADA4830-1 and ADA4830-2 allow
full balanced transmission using a differential source. In this
configuration, the differential input termination is equal to twice
the source impedance of each output. For example, a source
with 37.5 back termination resistors in each leg should be
terminated with a differential resistance of 75 . An illustration
of this arrangement is shown in Figure 32.
INN
INP
ADA4830-1
75
+
37.5
37.5
POSITIVE WIRE
NEGATIVE WIRE
DRIVER PCB
10020-
036
DIFFERENTIAL
AMPLIFIER
Figure 32. Fully Differential Mode
VOLTAGE REFERENCE (VREF PIN)
An internal reference level (VREF) determines the output voltage
when the differential input voltage is zero. A resistor divider
connected between the supply rails sets the VREF voltage. Built
with a pair of matched 40 k resistors, the divider sets this
voltage to +VS/2.
The voltage reference pin (VREF) normally floats at its default
value of +VS/2. However, it can be used to vary the output
reference level from this default value. A voltage applied to VREF
appears at the output with unity gain, within the bandwidth limit
of the internal reference buffer. Figure 17 shows the frequency
response of the VREF input.
Any noise on the +VS supply rail appears at the output with only
6 dB of attenuation (the divide-by-two provided by the reference
divider). Even when this pin is floating, it is recommended that
an external capacitor be connected from the reference node to
ground to provide further attenuation of noise on the power supply
line. A 4.7 F capacitor combined with the internal 40 k resistor
sets the low-pass corner at under 1 Hz and results in better than
40 dB of supply noise attenuation at 100 Hz.
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相關(guān)代理商/技術(shù)參數(shù) |
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| ADA4830-2WBCPZ-R7 | 制造商:AD 制造商全稱:Analog Devices 功能描述:High Speed Difference Amplifier with Input |
| ADA484 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit, 1 MSPS PulSAR ADC in MSOP QFN |
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| ADA4841-1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit Lower Power |
| ADA4841-1YR-EBZ | 制造商:AD 制造商全稱:Analog Devices 功能描述:Low Power, Low Noise and Distortion ail-to-Rail Output Amplifiers |
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