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參數(shù)資料
| 型號： | ADA4830-2BCPZ-R7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 21/23頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC AMP BATT PROTECT DUAL 16LFCSP |
| 標準包裝： | 1 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 2 |
| 轉(zhuǎn)換速率： | 220 V/µs |
| -3db帶寬： | 84MHz |
| 電流 - 電源： | 6.8mA |
| 電流 - 輸出 / 通道： | 125mA |
| 電壓 - 電源，單路/雙路(±)： | 2.9 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 125°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 16-WFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 16-LFCSP-WQ（3x3） |
| 包裝： | 標準包裝 |
| 其它名稱： | ADA4830-2BCPZ-R7DKR |
ADA4830-1/ADA4830-2
Data Sheet
Rev. C | Page 6 of 22
ABSOLUTE MAXIMUM RATINGS
Table 3.
Parameter
Rating
Supply Voltage (+VS Pin)
6 V
Supply Voltage Delta
+VS1 to +VS2, ADA4830-2 Only
0.5 V
Input Voltage Positive Direction (INNx, INPx)
22 V
Input Voltage Negative Direction (INNx, INPx)
10 V
Reference Voltage (VREFx Pin)
+VS + 0.3 V
Power Dissipation
Storage Temperature Range
65°C to +150°C
Operating Temperature Range
40°C to +125°C
Lead Temperature (Soldering, 10 sec)
260°C
Junction Temperature
150°C
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θJA is specified for the device and its exposed paddle is soldered
to a high thermal conductivity, 4-layer (2s2p) circuit board, as
described in EIA/JESD 51-7.
Table 4.
Package Type
θJA
θJC
Unit
8-Lead LFCSP
50
5
°C/W
16-Lead LFCSP
54
6
°C/W
MAXIMUM POWER DISSIPATION
The maximum safe power dissipation in the ADA4830-1 and
ADA4830-2 packages is limited by the associated rise in
junction temperature (TJ) on the die. At approximately 150°C,
which is the glass transition temperature, the plastic changes its
properties. Exceeding a junction temperature of 150°C for an
extended time can result in changes in the silicon devices,
potentially causing failure.
The power dissipated in the package (PD) is the sum of the
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the supply voltage (+VS) times the quiescent current (IS).
The power dissipated due to load drive depends on the particular
application. The power due to load drive is calculated by
multiplying the load current by the associated voltage drop
across the device. RMS voltages and currents must be used
in these calculations.
Airflow increases heat dissipation, effectively reducing θJA.
Figure 3 shows the maximum power dissipation in the package vs.
the ambient temperature for the 8-lead LFCSP (116°C/W) and
the 16-lead LFCSP (54°C/W) on a JEDEC standard 4-layer board.
θJA values are approximate.
10020-
050
0
0.5
1.0
1.5
2.0
2.5
3.0
0
10
20
30
40
50
60
70
80
90
100
MA
XI
MU
M
PO
W
ER
D
ISSI
PA
TION
(
W)
AMBIENT TEMPERATURE (°C)
16-LEAD LFCSP
8-LEAD LFCSP
Figure 3. Maximum Power Dissipation vs.
Ambient Temperature for a 4-Layer Board
ESD CAUTION
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