參數(shù)資料
型號(hào)： AD9887
廠商： Analog Devices, Inc.
英文描述： Dual Interface for Flat Panel Displays
中文描述： 雙接口的平板顯示器
文件頁(yè)數(shù)： 9/40頁(yè)
文件大?。?/td> 321K
代理商： AD9887
REV. 0
AD9887
–9–
Table II. Analog Interface Pin List
Pin Type
Pin Name
Function
Value
Pin No.
Analog Video Inputs
R
AIN
G
AIN
B
AIN
HSYNC
VSYNC
SOGIN
CLAMP
COAST
CKEXT
Analog Input for Converter R
Analog Input for Converter G
Analog Input for Converter B
Horizontal SYNC Input
Vertical SYNC Input
Sync-on-Green Input
Clamp Input (External CLAMP Signal)
PLL COAST Signal Input
External Pixel Clock Input (to Bypass Internal PLL)
or 10 k
to V
DD
ADC Sampling Clock Invert
HSYNC Output (Phase-Aligned with DATACK and
DATACK
)
VSYNC Output (Asynchronous)
Sync-on-Green Slicer Output or Raw HSYNC Output
Internal Reference Output (bypass with 0.1
μ
F to ground)
Reference Input (1.25 V
±
10%)
Voltage output equal to the RED converter midscale voltage.
During midscale clamping, the RED Input is clamped to this pin.
Voltage output equal to the GREEN converter midscale voltage.
During midscale clamping, the GREEN Input is clamped to this pin.
Voltage output equal to the BLUE converter midscale voltage.
During midscale clamping, the BLUE Input is clamped to this pin.
Connection for External Filter Components for Internal PLL
Main Power Supply
PLL Power Supply (Nominally 3.3 V)
Output Power Supply
Ground
0.0 V to 1.0 V
0.0 V to 1.0 V
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
0.0 V to 1.0 V
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
119
110
100
82
81
108
93
84
83
External
Sync/Clock
Inputs
CKINV
HSOUT
VSOUT
SOGOUT
REFOUT
REFIN
R
MIDSC
V
R
CLAMP
V
G
MIDSC
V
G
CLAMP
V
B
MIDSC
V
B
CLAMP
V
FILT
V
D
PV
D
V
DD
GND
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
3.3 V CMOS
1.25 V
1.25 V
±
10%
0.5 V
±
50%
0.0 V to 0.75 V
0.5 V
±
50%
0.0 V to 0.75 V
0.5 V
±
50%
0.0 V to 0.75 V
94
139
138
140
126
125
120
118
111
109
101
99
78
Sync Outputs
Voltage Reference
Clamp Voltages
PLL Filter
Power Supply
3.3 V
±
5%
3.3 V
±
5%
3.3 V or 2.5 V
±
5%
0 V
PIN FUNCTION DETAILS (ANALOG INTERFACE)
Inputs
R
AIN
Analog Input for RED Channel
G
AIN
Analog Input for GREEN Channel
B
AIN
Analog Input for BLUE Channel
High-impedance inputs that accept the RED,
GREEN, and BLUE channel graphics signals,
respectively. For RGB, the three channels
are
identical and can be used for any colors, but
colors are assigned for convenient reference.
For proper 4:2:2 formatting in a YUV
appli-
cation, the Y channel must be connected
to
the G
AIN
input, U must be connected to the
B
AIN
input, and V must be connected to the
R
AIN
input.
They accommodate input signals ranging
from 0.5 V to 1.0 V full scale. Signals should
be ac-coupled to these pins to support clamp
operation.
HSYNC
Horizontal Sync Input
This input receives a logic signal that estab-
lishes the horizontal timing reference and
provides the frequency reference for pixel
clock generation.
The logic sense of this pin is controlled by
serial register 0Fh Bit 7 (HSYNC Polarity).
Only the leading edge of HSYNC is active,
the trailing edge is ignored. When HSYNC
Polarity = 0, the falling edge of HSYNC is
used. When HSYNC Polarity = 1, the rising
edge is active.
The input includes a Schmitt trigger for noise
immunity, with a nominal input threshold
of 1.5 V.
Electrostatic Discharge (ESD) protection
diodes will conduct heavily if this pin is driven
more than 0.5 V above the maximum toler-
ance voltage (3.3 V), or more than 0.5 V
below ground.
Vertical Sync Input
This is the input for vertical sync.
Sync-on-Green Input
This input is provided to assist with processing
signals with embedded sync, typically on the
GREEN channel. The pin is connected to a
high-speed comparator with an internally
generated threshold, which is set to 0.15 V
above the negative peak of the input signal.
When connected to an ac-coupled graphics
signal with embedded sync, it will produce a
noninverting digital output on SOGOUT.
When not used, this input should be left
unconnected. For more details on this func-
tion and how it should be configured, refer to
the Sync-on-Green section.
VSYNC
SOGIN
相關(guān)PDF資料
PDF描述
AD9888 100/140/170/205 MSPS Analog Flat Panel Interface
AD9888KS-100 100/140/170/205 MSPS Analog Flat Panel Interface
AD9888KS-140 TRI N PLUG F 2-13
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9887/PCB 制造商:Analog Devices 功能描述:INTRFC DUAL FOR FLAT PNL DISPLAYS 160MQFP - Bulk
AD9887A 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual Interface for Flat Panel Displays
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AD9887AKS-140 制造商:Rochester Electronics LLC 功能描述:DUAL A/D INTERFACE FOR FLAT PANEL - Bulk 制造商:Analog Devices 功能描述:
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