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參數(shù)資料
| 型號(hào)： | AD9849AKSTZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/32頁 |
| 文件大小： | 0K |
| 描述： | IC CCD SIGNAL PROC 12BIT 48LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | CCD 信號(hào)處理器，12 位 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | 3 線串口 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-LQFP |
| 供應(yīng)商設(shè)備封裝： | 48-LQFP（7x7） |
| 包裝： | 托盤 |
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REV. A
AD9848/AD9849
–13–
Bit
Default
Address
Content
Width
Value
Register Name
Register Description
AFE Registers # Bits 56
00
[5:0]
6
00
oprmode[5:0]
AFE Operation Mode (See AFE Register Breakdown)
01
[1:0]
2
00
oprmode[7:6]
02
[5:0]
6
16
ccdgain[5:0]
VGA Gain
03
[3:0]
4
02
ccdgain[9:6]
04
[5:0]
6
00
refblack[5:0]
Black Clamp Level
05
[1:0]
2
02
refblack[7:6]
06
[5:0]
6
00
ctlmode
Control Mode (See AFE Register Breakdown)
07
[5:0]
6
00
pxga gain0
PxGA Color 0 Gain
08
[5:0]
6
00
pxga gain1
PxGA Color 1 Gain
09
[5:0]
6
00
pxga gain2
PxGA Color 2 Gain
0A
[5:0]
6
00
pxga gain3
PxGA Color 3 Gain
Miscellaneous/Extra # Bits 26
0F
[5:0]
6
00
INITIAL2
See Recommended Power-Up Sequence Section. Should be
set to “4” decimal (000100).
16
[0]
1
00
out_cont
Output Control (0 = Make All Outputs DC Inactive)
17
[5:0]
6
00
update[5:0]
Serial Data Update Control. Sets the line within the field
18
[5:0]
6
00
update[11:6]
for serial data update to occur.
19
[0]
1
00
preventupdate
Prevent the Update of the “VD/HD Updated” Registers
1B
[5:0]
6
00
doutphase
DOUT Phase Control
1C
[0]
1
00
disablerestore
Disable CCDIN DC Restore Circuit during PBLK
(1 = Disable)
1D
[0]
1
00
vdhdpol
VD/HD Active Polarity (0 = Low Active, 1 = High Active)
1E
[0]
1
01
fieldval
Internal Field Pulse Value (0 = Next Field Odd,
1 = Next Field Even)
1F
[0]
1
00
hblkretime
Re-Sync hblk to h1 Clock
20
[5:0]
6
00
INITIAL1
See Recommended Power-Up Sequence Section. Should be
set to “53” decimal (110101).
26
[0]
1
00
tgcore_rstb
TG Core Reset_Bar (0 = Hold TG Core in Reset,
1 = Resume Normal Operation)
Accessing a Double-Wide Register
There are many double-wide registers in the AD9848/AD9849,
for example, oprmode, clpdmtog1_0, and clpdmscp3, and so
on. These registers are configured into two consecutive 6-bit
registers with the least significant six bits located in the lower of
the two addresses and the remaining most significant bits
located in the higher of the two addresses. For example, the
six LSBs of the clpdmscp3 register, clpdmscp3[5:0], are
located at Address 0x81. The most significant six bits of the
clpdmscp3 register, clpdmscp3[11:6], are located at Address 0x82.
The following rules must be followed when accessing double-
wide registers:
1. When accessing a double-wide register, BOTH addresses
must be written to.
2. The lower of the two consecutive addresses for the double-
wide register must be written to first. In the example of the
clpdmscp3 register, the contents of Address 0x81 must
be written first followed by the contents of Address 0x82.
The register will be updated after the completion of the
write to Register 0x82, either at the next SL rising edge
or next VD/HD falling edge.
3. A single write to the lower of the two consecutive ad-
dresses of a double-wide register that is not followed by
a write to the higher address of the registers is not per-
mitted. This will not update the register.
4. A single write to the higher of the two consecutive ad-
dresses of a double-wide register that is not preceded by
a write to the lower of the two addresses is not permit-
ted. Although the write to the higher address will
update the full double-wide register, the lower six bits
of the register will be written with an indeterminate
value if the lower address was not written first.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9849AKSTZRL | 功能描述:IC CCD SIGNAL PROC 12BIT 48LQFP RoHS:是 類別:集成電路 (IC) >> 接口 - 傳感器和探測器接口 系列:- 其它有關(guān)文件:Automotive Product Guide 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:74 系列:- 類型:觸控式傳感器 輸入類型:數(shù)字 輸出類型:數(shù)字 接口:JTAG，串行 電流 - 電源:100µA 安裝類型:表面貼裝 封裝/外殼:20-TSSOP（0.173"，4.40mm 寬） 供應(yīng)商設(shè)備封裝:20-TSSOP 包裝:管件 |
| AD9849KST | 制造商:Rochester Electronics LLC 功能描述:12 BIT 25 MSPS 5V AFE & T - Tape and Reel 制造商:Analog Devices 功能描述: |
| AD9849KSTRL | 制造商:Analog Devices 功能描述:12 BIT 25 MSPS 5V AFE & T - Tape and Reel |
| AD9850 | 制造商:AD 制造商全稱:Analog Devices 功能描述:CMOS, 125 MHz Complete DDS Synthesizer |
| AD9850/CGPCB | 制造商:Analog Devices 功能描述:NCO/DDS, CMOS, 125MHZ COMPLETE DDS SYNTHESIZER - Bulk |
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