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參數(shù)資料
| 型號： | AD9833BRMZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/24頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC WAVEFORM GEN PROG 10MSOP |
| 產(chǎn)品培訓(xùn)模塊： | Direct Digital Synthesis Tutorial Series (1 of 7): Introduction Direct Digital Synthesizer Tutorial Series (7 of 7): DDS in Action Direct Digital Synthesis Tutorial Series (3 of 7): Angle to Amplitude Converter Direct Digital Synthesis Tutorial Series (6 of 7): SINC Envelope Correction Direct Digital Synthesis Tutorial Series (4 of 7): Digital-to-Analog Converter Direct Digital Synthesis Tutorial Series (2 of 7): The Accumulator |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 分辨率（位）： | 10 b |
| 主 fclk： | 25MHz |
| 調(diào)節(jié)字寬（位）： | 28 b |
| 電源電壓： | 2.3 V ~ 5.5 V |
| 工作溫度： | -40°C ~ 105°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 10-TFSOP，10-MSOP（0.118"，3.00mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 10-MSOP |
| 包裝： | 帶卷 (TR) |
Data Sheet
AD9833
Rev. E | Page 3 of 24
SPECIFICATIONS
VDD = 2.3 V to 5.5 V, AGND = DGND = 0 V, TA = TMIN to TMAX, RSET = 6.8 k for VOUT, unless otherwise noted.
Table 1.
Parameter1
Min
Typ
Max
Unit
Test Conditions/Comments
SIGNAL DAC SPECIFICATIONS
Resolution
10
Bits
Update Rate
25
MSPS
VOUT Maximum
0.65
V
VOUT Minimum
38
mV
VOUT Temperature Coefficient
200
ppm/°C
DC Accuracy
Integral Nonlinearity
±1.0
LSB
Differential Nonlinearity
±0.5
LSB
DDS SPECIFICATIONS (SFDR)
Dynamic Specifications
Signal-to-Noise Ratio (SNR)
55
60
dB
f
MCLK = 25 MHz, fOUT = fMCLK/4096
Total Harmonic Distortion (THD)
66
56
dBc
f
MCLK = 25 MHz, fOUT = fMCLK/4096
Spurious-Free Dynamic Range (SFDR)
Wideband (0 to Nyquist)
60
dBc
f
MCLK = 25 MHz, fOUT = fMCLK/50
Narrow-Band (±200 kHz)
78
dBc
f
MCLK = 25 MHz, fOUT = fMCLK/50
Clock Feedthrough
60
dBc
Wake-Up Time
1
ms
LOGIC INPUTS
Input High Voltage, V
INH
1.7
V
2.3 V to 2.7 V power supply
2.0
V
2.7 V to 3.6 V power supply
2.8
V
4.5 V to 5.5 V power supply
Input Low Voltage, V
INL
0.5
V
2.3 V to 2.7 V power supply
0.7
V
2.7 V to 3.6 V power supply
0.8
V
4.5 V to 5.5 V power supply
Input Current, I
INH/IINL
10
A
Input Capacitance, C
IN
3
pF
POWER SUPPLIES
f
MCLK = 25 MHz, fOUT = fMCLK/4096
VDD
2.3
5.5
V
I
DD
4.5
5.5
mA
I
DD code dependent; see Figure 7
Low Power Sleep Mode
0.5
mA
DAC powered down, MCLK running
1 Operating temperature range is 40°C to +105°C; typical specifications are at 25°C.
VOUT
COMP
12
AD9833
10-BIT DAC
SIN
ROM
20pF
10nF
VDD
REGULATOR
100nF
CAP/2.5V
02704-
002
Figure 2. Test Circuit Used to Test Specifications
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