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參數(shù)資料
| 型號： | AD9787-DPG2-EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 18/64頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVALUATION FOR AD9787 |
| 標準包裝： | 1 |
| 系列： | * |
| DAC 的數(shù)量： | 2 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 800M |
| 數(shù)據(jù)接口： | 串行 |
| 設置時間： | 22ms |
| DAC 型： | 電流 |
| 工作溫度： | -40°C ~ 85°C |
| 已供物品： | * |
| 已用 IC / 零件： | AD9787 |
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AD9785/AD9787/AD9788
Rev. A | Page 25 of 64
Address
Register
Name
Bit
Range
MSB
MSB 1
MSB 2
MSB 3
MSB 4
MSB 5
MSB 6
LSB
Default
0x0B
Phase
Control
Register
[15:0]
NCO Phase Offset Word [15:0]
0x00
[23:16]
Phase Correction Word [7:0]
0x00
[31:24]
Reserved
Phase Correction Word
[9:8]
0x00
0x0C
Amplitude
Scale
Factor
Register
[7:0]
I DAC Amplitude Scale Factor [7:0]
0x80
[15:8]
Q DAC Amplitude Scale Factor [6:0]
I DAC
Amplitude
Scale
Factor [8]
0x00
[23:16]
Reserved
Q DAC Amplitude Scale
Factor [8:7]
0x01
0x0D
Output
Offset
Register
[15:0]
I DAC Offset [15:0]
0x00
[31:16]
Q DAC Offset [15:0]
0x00
Version
Register
[7:0]
Version ID
[15:8]
Reserved
RAM
[31:0]
RAM
0x1E
Test
Register
[23:0]
Test
1 Address space between Address 0x0E and Address 0x1D is intentionally left open.
SPI REGISTER DESCRIPTIONS
The communication (COMM) register comprises one byte located at Address 0x00.
Table 10. Communication (COMM) Register
Address
Bit
Name
Description
0x00
[7]
SPI_SDIO
bidirectional
0: Default. Use the SPI_SDIO pin for input data only, 4-wire serial mode.
1: Use SPI_SDIO as a read/write pin, 3-wire serial mode.
[6]
LSB first
0: Default. MSB first format is active.
1: Serial interface accepts serial data in LSB first format.
[5]
Software reset
0: Default. Bit is in the inactive state.
1: In the AD9785/AD9787/AD9788, all programmable bits return to their power-up state
except for the COMM register bits, which are unaffected by the software reset. The software
reset remains in effect until this bit is set to 0 (inactive state).
[4]
Power-down mode
0: Default. The full chip power-down is not active.
1: The AD9785/AD9787/AD9788 enter a power-down mode in which all functions are
powered down. This power-down puts the part into its lowest possible power dissipation
state. The part remains in this low power state until the user sets this bit to a Logic 0. The
analog circuitry requires 250 ms to become operational.
[3]
Auto power-down
enable
0: Default. Inactive state, automatic power-down feature is not enabled.
1: The device automatically switches into its low power mode whenever TXENABLE is
deasserted for a sufficiently long period of time.
[2]
I/O transfer
(self-reset)
0: Default. Inactive state.
1: The contents of the frequency tuning word memory buffer, phase control memory buffer,
amplitude scale factor memory buffer, and the output offset memory buffer are moved to a
memory location that affects operation of the device. The one-word memory buffer is
employed to simultaneously update the NCO frequency, phase, amplitude, and offset control.
Note that this bit automatically clears itself after the I/O transfer occurs. For this reason,
unless the reference clock is stopped, it is difficult to read back a Logic 1 on this bit.
[1]
Automatic I/O
transfer enable
0: Automatic I/O transfer disabled. The I/O transfer bit (Bit 2) must be set to update the device
in the event that changes have been made to Register 0x0A, Register 0x0B, Register 0x0C, or
Register 0x0D. This allows the user to change important operating modes of the device all at
once, rather than one at a time with individual SPI writes.
1: Default. Automatic I/O transfer enabled. The device updates its operation immediately
when SPI writes are completed to Register 0x0A, Register 0x0B, Register 0x0C, or Register 0x0D.
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相關代理商/技術參數(shù) |
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| AD9788 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Dual 12-/14-/16-Bit 800 MSPS DAC with Low Power 32-Bit Complex NCO |
| AD9788BSVZ | 功能描述:IC DAC 16BIT 800MSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:50 系列:- 設置時間:4µs 位數(shù):12 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 電壓電源:單電源 功率耗散（最大）:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:8-TSSOP，8-MSOP（0.118"，3.00mm 寬） 供應商設備封裝:8-uMAX 包裝:管件 輸出數(shù)目和類型:2 電壓，單極 采樣率（每秒）:* 產(chǎn)品目錄頁面:1398 (CN2011-ZH PDF) |
| AD9788BSVZRL | 功能描述:IC DAC 16BIT 800MSPS 100TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 數(shù)模轉(zhuǎn)換器 系列:TxDAC® 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:1,000 系列:- 設置時間:1µs 位數(shù):8 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:8 電壓電源:雙 ± 功率耗散（最大）:941mW 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC W 包裝:帶卷 (TR) 輸出數(shù)目和類型:8 電壓，單極 采樣率（每秒）:* |
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