REV. C
–2–
AD9751–SPECIFICATIONS
DC SPECIFICATIONS (T
MIN to TMAX, AVDD = DVDD = PLLVDD = CLKVDD = 3.3 V, IOUTFS = 20 mA, unless otherwise noted.)
Parameter
Min
Typ
Max
Unit
RESOLUTION
10
Bits
DC ACCURACY
1
Integral Linearity Error (INL)
–1
±0.3
+1
LSB
Differential Nonlinearity (DNL)
–0.5
±0.2
+0.5
LSB
ANALOG OUTPUT
Offset Error
–0.025
±0.01
+0.025
% of FSR
Gain Error (Without Internal Reference)
–5
±0.5
+2
% of FSR
Gain Error (With Internal Reference)
–7
±0.25
+2
% of FSR
Full-Scale Output Current
2
2.0
20.0
mA
Output Compliance Range
–1.0
+1.25
V
Output Resistance
100
k
Output Capacitance
5
pF
REFERENCE OUTPUT
Reference Voltage
1.14
1.20
1.26
V
Reference Output Current
3
100
nA
REFERENCE INPUT
Input Compliance Range
0.1
1.25
V
Reference Input Resistance
1
M
TEMPERATURE COEFFICIENTS
Offset Drift
0
ppm of FSR/
°C
Gain Drift (Without Internal Reference)
±50
ppm of FSR/
°C
Gain Drift (With Internal Reference)
±100
ppm of FSR/
°C
Reference Voltage Drift
±50
ppm/
°C
POWER SUPPLY
Supply Voltages
AVDD
3.0
3.3
3.6
V
DVDD
3.0
3.3
3.6
V
PLLVDD
3.0
3.3
3.6
V
CLKVDD
3.0
3.3
3.6
V
Analog Supply Current (IAVDD)
4
33
36
mA
Digital Supply Current (IDVDD)
4
3.5
4.5
mA
PLL Supply Current (IPLLVDD)
4
4.5
5.1
mA
Clock Supply Current (ICLKVDD)
4
10.0
11.5
mA
Power Dissipation
4 (3 V, I
OUTFS = 20 mA)
155
165
mW
Power Dissipation
5 (3 V, I
OUTFS = 20 mA)
216
mW
Power Supply Rejection Ratio
6—AVDD
–0.1
+0.1
% of FSR/V
Power Supply Rejection Ratio
6—DVDD
–0.04
+0.04
% of FSR/V
OPERATING RANGE
–40
+85
°C
NOTES
1Measured at I
OUTA, driving a virtual ground.
2Nominal full-scale current, I
OUTFS, is 32
× the I
REF current.
3An external buffer amplifier is recommended to drive any external load.
4100 MSPS f
DAC with PLL on, fOUT = 1 MHz, all supplies = 3.0 V.
5300 MSPS f
DAC.
6
±5% power supply variation.
Specifications subject to change without notice.