參數(shù)資料
型號: AD9540BCPZ-REEL7
廠商: Analog Devices Inc
文件頁數(shù): 17/32頁
文件大小: 0K
描述: IC CLOCK GEN/SYNTHESIZER 48LFCSP
標準包裝: 750
類型: 時鐘發(fā)生器
PLL:
輸入: 時鐘
輸出: CML,PECL
電路數(shù): 1
比率 - 輸入:輸出: 2:2
差分 - 輸入:輸出: 是/是
頻率 - 最大: 655MHz
除法器/乘法器: 是/無
電源電壓: 1.71 V ~ 1.89 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
AD9540
Rev. A | Page 24 of 32
REGISTER MAP AND DESCRIPTION
Table 4. Register Map
Register
Name
(Serial
Address)
Bit
Range
Bit 7 (MSB)
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0 (LSB)
Default
Value/
Profile
[31:24]
Open1
Open1
Open1
Open1
Open1
STATUS_Error
0x00
[23:16]
Load SRR @
I/O_UPDATE
Auto-
Clear
Freq.
Accum.
Auto-
Clear
Phase
Accum.
Enable
Sine
Output
Clear
Freq.
Accum.
Clear
Phase
Accum.
Open1
Open1
0x00
[15:8]
LSB First
SDI/O
Input
Only
Open1
Open1
Open1
Open1
0x00
Control
Function
Register 1
(CFR1)
(0x00)
[7:0]
Digital
Power-
Down
PFD
Input
Power-
Down
REFIN
Cyrstal
Enable
SYNC_CLK
Out
Disable
Auto
Sync
Multiple
AD9540s
Software
Manual
Sync
Hardware
Manual
Sync
High Speed
Sync Enable
0x00
[39:32]
DAC Power-
Down
Open1
Open1
Open1
Internal
Band Gap
Power-
Down
Internal CML
Driver
DRV_RSET
0x00
[31:24]
Clock Driver Rising Edge [31:29]
Clock Driver Falling Edge Control
[28:26]
PLL Lock
Detect
Enable
PLL Lock
Detect Mode
0x00
[23:16]
RF Divider
Power-
Down
RF Divider
Ratio[22:21]
Clock
Driver
Power-
Down
Clock Driver Input
Select [19:18]
Slew Rate
Control
RF Div CLK1
Mux Bit
0x78
[15:8]
Divider N Control[15:12]
Divider M Control[11:8]
0x00
Control
Function
Register 2
(CFR2)
(0x01)
[7:0]
Open1
CP
Polarity
CP Full PD
CP Quick
PD
CP Current Scale[2:0]
0x07
[23:16]
Rising Delta Frequency Tuning Word [23:16]
0x00
[15:8]
Rising Delta Frequency Tuning Word [15:8]
0x00
Rising Delta
Frequency
Tuning
Word
(RDFTW)
(0x02)
[7:0]
Rising Delta Frequency Tuning Word [7:0]
0x00
[23:16]
Falling Delta Frequency Tuning Word [23:16]
0x00
[15:8]
Falling Delta Frequency Tuning Word [15:8]
0x00
Falling
Delta
Frequency
Tuning
Word
(FDFTW)
(0x03)
[7:0]
Falling Delta Frequency Tuning Word [7:0]
0x00
[15:8]
Rising Sweep Ramp Rate [15:8]
0x00
Rising
Sweep
Ramp Rate
(RSRR)
(0x04)
[7:0]
Rising Sweep Ramp Rate [7:0]
0x00
[15:8]
Falling Sweep Ramp Rate [15:8]
0x00
Falling
Sweep
Ramp Rate
(FSRR)
(0x05)
[7:0]
Falling Sweep Ramp Rate [7:0]
0x00
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