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參數(shù)資料
| 型號： | AD9522-4BCPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/84頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK GEN 1.6GHZ VCO 64LFCSP |
| 標準包裝： | 750 |
| 類型： | 時鐘發(fā)生器，扇出配送 |
| PLL： | 是 |
| 輸入： | CMOS，LVDS，LVPECL |
| 輸出： | CMOS，LVDS |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 2:12，2:24 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.8GHz |
| 除法器/乘法器： | 是/無 |
| 電源電壓： | 3.135 V ~ 3.465 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 帶卷 (TR) |
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AD9522-4
Rev. 0 | Page 18 of 84
Pin No.
Input/
Output
Pin
Type
Mnemonic
Description
15
I
3.3 V CMOS
CS
Serial Control Port Chip Select; Active Low. This pin has an internal 30 kΩ
pull-up resistor.
16
I
3.3 V CMOS
SCLK/SCL
Serial Control Port Clock Signal. This pin has an internal 30 kΩ pull-down resistor
in SPI mode but is high impedance in IC mode.
17
I/O
3.3 V CMOS
SDIO/SDA
Serial Control Port Bidirectional Serial Data In/Out.
18
O
3.3 V CMOS
SDO
Serial Control Port Unidirectional Serial Data Out.
19, 59
I
GND
Ground Pins.
20
I
Three-level
logic
SP1
Select SPI or IC as the serial interface port and select the IC slave address in IC
mode. Three-level logic. This pin is internally biased for the open logic level.
21
I
Three-level
logic
SP0
Select SPI or IC as the serial interface port and select the IC slave address in IC
mode. Three-level logic. This pin is internally biased for the open logic level.
22
I
3.3 V CMOS
EEPROM
Setting this pin high selects the register values stored in the internal EEPROM to
be loaded at reset and/or power-up. Setting this pin low causes the AD9522 to
load the hard-coded default register values at power-up/reset. This pin has an
internal 30 kΩ pull-down resistor.
23
I
3.3 V CMOS
RESET
Chip Reset, Active Low. This pin has an internal 30 kΩ pull-up resistor.
24
I
3.3 V CMOS
PD
Chip Power-Down, Active Low. This pin has an internal 30 kΩ pull-up resistor.
25
O
LVDS or
CMOS
OUT9 (OUT9A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
26
O
LVDS or
CMOS
OUT9 (OUT9B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
28
O
LVDS or
CMOS
OUT10 (OUT10A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
29
O
LVDS or
CMOS
OUT10 (OUT10B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
30
O
LVDS or
CMOS
OUT11 (OUT11A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
31
O
LVDS or
CMOS
OUT11 (OUT11B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
33
O
LVDS or
CMOS
OUT6 (OUT6A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
34
O
LVDS or
CMOS
OUT6 (OUT6B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
36
O
LVDS or
CMOS
OUT7 (OUT7A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
37
O
LVDS or
CMOS
OUT7 (OUT7B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
38
O
LVDS or
CMOS
OUT8 (OUT8A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
39
O
LVDS or
CMOS
OUT8 (OUT8B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
42
O
LVDS or
CMOS
OUT5 (OUT5B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
43
O
LVDS or
CMOS
OUT5 (OUT5A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
44
O
LVDS or
CMOS
OUT4 (OUT4B)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
45
O
LVDS or
CMOS
OUT4 (OUT4A)
Clock Output. This pin can be configured as one side of a differential LVDS output
or as a single-ended CMOS output.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9522-5 | 制造商:AD 制造商全稱:Analog Devices 功能描述:12 LVDS/24 CMOS Output Clock Generator |
| AD9522-5/PCBZ | 功能描述:BOARD EVALUATION FOR AD9522-5 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:- 標準包裝:1 系列:PSoC® 主要目的:電源管理，熱管理 嵌入式:- 已用 IC / 零件:- 主要屬性:- 次要屬性:- 已供物品:板，CD，電源 |
| AD9522-5BCPZ | 功能描述:IC CLOCK GEN 2.4GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9522-5BCPZ-REEL7 | 功能描述:IC CLOCK GEN 2.4GHZ 64LFCSP RoHS:是 類別:集成電路 (IC) >> 時鐘/計時 - 時鐘發(fā)生器，PLL，頻率合成器 系列:- 標準包裝:2,000 系列:- 類型:PLL 時鐘發(fā)生器 PLL:帶旁路 輸入:LVCMOS，LVPECL 輸出:LVCMOS 電路數(shù):1 比率 - 輸入:輸出:2:11 差分 - 輸入:輸出:是/無 頻率 - 最大:240MHz 除法器/乘法器:是/無 電源電壓:3.135 V ~ 3.465 V 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:32-LQFP 供應(yīng)商設(shè)備封裝:32-TQFP（7x7） 包裝:帶卷 (TR) |
| AD9523 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Jitter Cleaner and Clock Generator with 14 Differential or 29 LVCMOS Outputs |
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