參數(shù)資料
型號: AD9518-2ABCPZ-RL7
廠商: Analog Devices Inc
文件頁數(shù): 37/64頁
文件大小: 0K
描述: IC CLOCK GEN 6CH 2.2GHZ 48LFCSP
標(biāo)準(zhǔn)包裝: 750
類型: 時(shí)鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:6
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.33GHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
AD9518-2
Data Sheet
Rev. C | Page 42 of 64
Table 39. Serial Control Port, 16-Bit Instruction Word, MSB First
MSB
LSB
I15
I14
I13
I12
I11
I10
I9
I8
I7
I6
I5
I4
I3
I2
I1
I0
R/W
W1
W0
A12 = 0
A11 = 0
A10 = 0
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CS
SCLK DON'T CARE
SDIO
A12
W0
W1
R/W
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
D7 D6 D5 D4 D3
D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
DON'T CARE
16-BIT INSTRUCTION HEADER
REGISTER (N) DATA
REGISTER (N – 1) DATA
0
6
431
-038
Figure 46. Serial Control Port Write—MSB First, 16-Bit Instruction, Two Bytes Data
CS
SCLK
SDIO
SDO
REGISTER (N) DATA
16-BIT INSTRUCTION HEADER
REGISTER (N – 1) DATA
REGISTER (N – 2) DATA
REGISTER (N – 3) DATA
A12
W0
W1
R/W
A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
DON’T CARE
DON’T
CARE
D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0
06
43
1-
0
39
Figure 47. Serial Control Port Read—MSB First, 16-Bit Instruction, Four Bytes Data
tS
DON’T CARE
W1
W0
A12
A11
A10
A9A8A7A6A5
D4D3
D2D1D0
DON’T CARE
R/W
tDS
tDH
tHIGH
tLOW
tCLK
tC
CS
SCLK
SDIO
06
43
1-
04
0
Figure 48. Serial Control Port Write—MSB First, 16-Bit Instruction, Timing Measurements
DATA BIT N – 1
DATA BIT N
CS
SCLK
SDIO
SDO
tDV
06
431
-04
1
Figure 49. Serial Control Port Timing Diagram—Read
CS
SCLK DON'T CARE
DON'T CARE
16-BIT INSTRUCTION HEADER
REGISTER (N) DATA
REGISTER (N + 1) DATA
SDIO
DON'T CARE
A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10 A11 A12
D1
D0
R/W
W1
W0
D2 D3 D4
D5 D6 D7 D0 D1 D2 D3 D4 D5 D6 D7
0
64
31
-0
42
Figure 50. Serial Control Port Write—LSB First, 16-Bit Instruction, Two Bytes Data
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