參數(shù)資料
型號: AD9517-2ABCPZ-RL7
廠商: Analog Devices Inc
文件頁數(shù): 69/80頁
文件大?。?/td> 0K
描述: IC CLOCK GEN 2.2GHZ VCO 48LFCSP
標(biāo)準(zhǔn)包裝: 750
類型: 時鐘發(fā)生器,扇出配送
PLL:
輸入: CMOS,LVDS,LVPECL
輸出: CMOS,LVDS,LVPECL
電路數(shù): 1
比率 - 輸入:輸出: 1:12
差分 - 輸入:輸出: 是/是
頻率 - 最大: 2.33GHz
除法器/乘法器: 是/無
電源電壓: 3.135 V ~ 3.465 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 48-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 48-LFCSP-VQ(7x7)
包裝: 帶卷 (TR)
Data Sheet
AD9517-2
Rev. E | Page 71 of 80
Reg.
Addr.
(Hex)
Bits
Name
Description
0x141
0
OUT5 power-down
Powers down output (LVDS/CMOS).
0: power on.
1: power off (default).
0x142
[7:5]
OUT6 output polarity
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
6
5
OUT6A (CMOS)
OUT6B (CMOS)
OUT6 (LVDS)
0
Noninverting
Inverting
Noninverting
0
1
0
Noninverting
Noninverting (default)
1
0
Inverting
Noninverting
1
0
Inverting
Noninverting
0
1
Inverting
Noninverting
Inverting
0
1
Inverting
1
0
1
Noninverting
Inverting
1
Noninverting
Inverting
4
OUT6 CMOS B
In CMOS mode, turns on/off the CMOS B output. There is no effect in LVDS mode.
0: turns off the CMOS B output (default).
1: turns on the CMOS B output.
3
OUT6 select LVDS/CMOS
Selects LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
[2:1]
OUT6 LVDS output current
Sets output current level in LVDS mode. This has no effect in CMOS mode.
2
1
Current (mA)
Recommended Termination ()
0
1.75
100
0
1
3.5
100 (default)
1
0
5.25
50
1
7
50
0
OUT6 power-down
Powers down output (LVDS/CMOS).
0: power on (default).
1: power off.
0x143
[7:5]
OUT7 output polarity
In CMOS mode, Bits[7:5] select the output polarity of each CMOS output.
In LVDS mode, only Bit 5 determines LVDS polarity.
7
6
5
OUT7A (CMOS)
OUT7B (CMOS)
OUT7 (LVDS)
0
Noninverting
Inverting
Noninverting
0
1
0
Noninverting
Noninverting (default)
1
0
Inverting
Noninverting
1
0
Inverting
Noninverting
0
1
Inverting
Noninverting
Inverting
0
1
Inverting
1
0
1
Noninverting
Inverting
1
Noninverting
Inverting
4
OUT7 CMOS B
In CMOS mode, turns on/off the CMOS B output. There is no effect in LVDS mode.
0: turns off the CMOS B output (default).
1: turns on the CMOS B output.
3
OUT7 select LVDS/CMOS
Selects LVDS or CMOS logic levels.
0: LVDS (default).
1: CMOS.
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