參數(shù)資料
型號(hào)： AD9516-3BCPZ-REEL7
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 56/80頁(yè)
文件大?。?/td> 0K
描述： IC CLOCK PLL/VCO 2GHZ 64LFCSP
標(biāo)準(zhǔn)包裝： 750
類型： 時(shí)鐘發(fā)生器，扇出配送
PLL： 是
輸入： 時(shí)鐘
輸出： CMOS，LVDS，LVPECL
電路數(shù)： 1
比率 - 輸入:輸出： 1:14
差分 - 輸入:輸出： 是/是
頻率 - 最大： 2.25GHz
除法器/乘法器： 是/無(wú)
電源電壓： 3.135 V ~ 3.465 V
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
配用： AD9516-3/PCBZ-ND - BOARD EVAL FOR AD9516-3 2.0GHZ
AD9516-3
Data Sheet
Rev. C | Page 6 of 80
CLOCK INPUTS
Table 3.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
CLOCK INPUTS (CLK, CLK)
Differential input
Input Frequency
2.4
GHz
High frequency distribution (VCO divider)
1.6
GHz
Distribution only (VCO divider bypassed)
Input Sensitivity, Differential
150
mV p-p
Measured at 2.4 GHz; jitter performance is
improved with slew rates > 1 V/ns
Input Level, Differential
2
V p-p
Larger voltage swings may turn on the protection
diodes and may degrade jitter performance
Input Common-Mode Voltage, VCM
1.3
1.57
1.8
V
Self-biased; enables ac coupling
Input Common-Mode Range, VCMR
1.3
1.8
V
With 200 mV p-p signal applied; dc-coupled
Input Sensitivity, Single-Ended
150
mV p-p
CLK ac-coupled; CLK ac-bypassed to RF ground
Input Resistance
3.9
4.7
5.7
k
Self-biased
Input Capacitance
2
pF
1
Below about 1 MHz, the input should be dc-coupled. Care should be taken to match VCM.
CLOCK OUTPUTS
Table 4.
Parameter
Min
Typ
Max
Unit
Test Conditions/Comments
LVPECL CLOCK OUTPUTS
Termination = 50 to VS 2 V
OUT0, OUT1, OUT2, OUT3, OUT4, OUT5
Differential (OUT, OUT)
Output Frequency, Maximum
2950
MHz
Using direct to output; see Figure 25 for peak-to-
peak differential amplitude
Output High Voltage (VOH)
VS 1.12
VS 0.98
VS 0.84
V
Output Low Voltage (VOL)
VS 2.03
VS 1.77
VS 1.49
V
Output Differential Voltage (VOD)
550
790
980
mV
VOH VOL for each leg of a differential pair for
default amplitude setting with driver not toggling;
see Figure 25 for variation over frequency
LVDS CLOCK OUTPUTS
Differential termination 100 at 3.5 mA
OUT6, OUT7, OUT8, OUT9
Differential (OUT, OUT)
Output Frequency
800
MHz
The AD9516 outputs toggle at higher frequencies,
but the output amplitude may not meet the VOD
specification; see Figure 26
Differential Output Voltage (VOD)
247
360
454
mV
VOH VOL measurement across a differential pair at
the default amplitude setting with output driver
not toggling; see Figure 26 for variation over
frequency
Delta VOD
25
mV
This is the absolute value of the difference
between VOD when the normal output is high vs.
when the complementary output is high
Output Offset Voltage (VOS)
1.125
1.24
1.375
V
(VOH + VOL)/2 across a differential pair
Delta VOS
25
mV
This is the absolute value of the difference
between VOS when the normal output is high vs.
when the complementary output is high
Short-Circuit Current (ISA, ISB)
14
24
mA
Output shorted to GND
CMOS CLOCK OUTPUTS
OUT6A, OUT6B, OUT7A, OUT7B,
OUT8A, OUT8B, OUT9A, OUT9B
Single-ended; termination = 10 pF
Output Frequency
250
MHz
Output Voltage High (VOH)
VS 0.1
V
At 1 mA load
Output Voltage Low (VOL)
0.1
V
At 1 mA load
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AD9516-4/PCBZ 制造商:Analog Devices 功能描述:AD9516-4, PLL CLOCK SYNTHESIZER, EVALUAT
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AD9516-4BCPZ 制造商:Analog Devices 功能描述:CLOCK GENERATOR, 1.8GHZ, LFCSP-64
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