參數(shù)資料
型號: AD9444BSVZ-80
廠商: Analog Devices Inc
文件頁數(shù): 33/40頁
文件大小: 0K
描述: IC ADC 14BIT 80MSPS 100TQFP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 14
采樣率(每秒): 80M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 1.4W
電壓電源: 單電源
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 100-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 100-TQFP-EP(14x14)
包裝: 托盤
輸入數(shù)目和類型: 1 個差分,單極
AD9444
Rev. 0 | Page 39 of 40
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MS-026AED-HD
NOTES
1. CENTER FIGURES ARE TYPICAL UNLESS OTHERWISE NOTED.
2. THE PACKAGE HAS A CONDUCTIVE HEAT SLUG TO HELP DISSIPATE HEAT AND ENSURE RELIABLE OPERATION OF
THE DEVICE OVER THE FULL INDUSTRIAL TEMPERATURE RANGE. THE SLUG IS EXPOSED ON THE BOTTOM OF
THE PACKAGE AND ELECTRICALLY CONNECTED TO CHIP GROUND. IT IS RECOMMENDED THAT NO PCB SIGNAL
TRACES OR VIAS BE LOCATED UNDER THE PACKAGE THAT COULD COME IN CONTACT WITH THE CONDUCTIVE
SLUG. ATTACHING THE SLUG TO A GROUND PLANE WILL REDUCE THE JUNCTION TEMPERATURE OF THE
DEVICE WHICH MAY BE BENEFICIAL IN HIGH TEMPERATURE ENVIRONMENTS.
3. THE EXPOSED HEAT SINK SOLDERED TO THE GROUND PLANE IS REQUIRED FOR THE 100-LEAD TQFP/EP.
1
25
26
50
76
100
75
51
14.00 SQ
16.00 SQ
0.27
0.22
0.17
0.50 BSC
1.05
1.00
0.95
0.15
0.05
0.75
0.60
0.45
SEATING
PLANE
1.20
MAX
1
25
26
50
76
100
75
51
6.50
NOM
3.5°
COPLANARITY
0.08
0.20
0.09
TOP VIEW
(PINS DOWN)
BOTTOM VIEW
(PINS UP)
CONDUCTIVE
HEAT SINK
Figure 70. 100-Lead Thin Quad Flat Package, Exposed Pad [TQFP_EP]
(SV-100-1)
Dimensions shown in millimeters
ORDERING GUIDE
Model
Temperature Range
Package Description
Package Outline
AD9444BSVZ-801
–40°C to +85°C
100-Lead TQFP_EP
SV-100-1
AD9444-CMOS/PCB
CMOS Mode Evaluation Board
AD9444-LVDS/PCB
LVDS Mode Evaluation Board
1 Z = Pb-free part.
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