- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄10653 > AD9269BCPZ-20 (Analog Devices Inc)IC ADC 16BIT SER 2CH 64LFCSP PDF資料下載
參數(shù)資料
| 型號： | AD9269BCPZ-20 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 29/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SER 2CH 64LFCSP |
| 特色產(chǎn)品： | AD9269/65 Low-Power, High-Speed 16-Bit, 1.8V ADCs |
| 標準包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 20M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 102mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 4 個單端，單極；4 個單端，雙極；2 個差分，單極；2 個差分，雙極 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁當前第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁
AD9269
Rev. 0 | Page 35 of 40
Bit 1—Open
Bit 0—Disable SDIO Pull-Down
This bit can be set high to disable the internal 30 kΩ pull-down
on the SDIO pin, which can be used to limit the loading when
many devices are connected to the SPI bus.
QEC Control 0 (Register 0x110)
Bits[7:6]—Open
Bits[5:3]—Freeze DC/Freeze Phase/Freeze Gain
These bits can be used to freeze the corresponding dc, phase,
and gain offset corrections of the quadrature error correction
(QEC) independently. When asserted high, QEC is applied
using frozen values, and the estimation of the quadrature errors
is halted.
Bits[2:0]—DC Enable/Phase Enable/Gain Enable
These bits allow the corresponding dc, phase, and gain offset
corrections to be enabled independently.
QEC Control 1 (Register 0x111)
Bits[7:3]—Open
Bit 2—Force DC
When set high, this bit forces the initial static correction values
from Register 0x11A and Register 0x11B for the I data and
Register 0x11C and Register 0x11D for the Q data.
Bit 1—Force Phase
When set high, this bit forces the initial static correction values
from Register 0x118 and Register 0x119.
Bit 0—Force Gain
When set high, this bit forces the initial static correction values
from Register 0x116 and Register 0x117.
QEC Gain Bandwidth Control (Register 0x112)
Bits[7:5]—Open
Bits[4:0]—KEXP_GAIN
These bits adjust the time constants of the gain control feedback
loop for quadrature error correction.
QEC Phase Bandwidth Control (Register 0x113)
Bits[7:5]—Open
Bits[4:0]—KEXP_PHASE
These bits adjust the time constants of the phase control
feedback loop for quadrature error correction.
QEC DC Bandwidth Control (Register 0x114)
Bits[7:5]—Open
Bits[4:0]—KEXP_DC
These bits adjust the time constants of the dc control feedback
loop for quadrature error correction.
QEC Initial Gain 0, QEC Initial Gain 1 (Register 0x116 and
Register 0x117)
Bits[14:0]—Initial Gain
When the force gain bit (Register 0x111, Bit 0) is set high, these
values are used for gain error correction.
QEC Initial Phase 0, QEC Initial Phase 1 (Register 0x118 and
Register 0x119)
Bits[12:0]—Initial Phase
When the force phase bit (Register 0x111, Bit 1) is set high,
these values are used for phase error correction.
QEC Initial DC I 0, QEC Initial DC I 1 (Register 0x11A and
Register 0x11B)
Bits[13:0]—Initial DC I
When the force dc bit (Register 0x111, Bit 2) is set high, these
values are used for dc error correction.
QEC Initial DC Q 0, QEC Initial DC Q 1 (Register 0x11C and
Register 0x11D)
Bits[13:0]—Initial DC Q
When the force dc bit (Register 0x111, Bit 2) is set high, these
values are used for dc error correction.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VE-21H-MX | CONVERTER MOD DC/DC 52V 75W |
| VE-21F-MX | CONVERTER MOD DC/DC 72V 75W |
| LTC2253IUH#PBF | IC ADC 12-BIT 125MSPS 3V 32-QFN |
| MAX483CSA+ | IC TXRX RS485/RS422 8-SOIC |
| VE-21D-MX | CONVERTER MOD DC/DC 85V 75W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9269BCPZ-40 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16 Bit 40 Msps low pwr dual ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風格: 封裝 / 箱體: |
| AD9269BCPZ-65 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16 Bit 65 Msps low pwr dual ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風格: 封裝 / 箱體: |
| AD9269BCPZ-80 | 制造商:Analog Devices 功能描述:ADC Dual Pipelined 80Msps 16-bit Parallel/Serial (3-Wire, SPI) 64-Pin LFCSP EP 制造商:Analog Devices 功能描述:16 BIT 80 MSPS LOW PWR DUAL ADC - Trays 制造商:Analog Devices 功能描述:ADC Dual Pipelined 80MSPS 16-Bit Parallel/Serial (3-Wire, SPI) 64-Pin LFCSP EP Tray 制造商:Analog Devices 功能描述:IC ADC 16BIT 80MSPS SPI LFCSP-64 制造商:Analog Devices Inc. 功能描述:Analog to Digital Converters - ADC 16 Bit 80 Msps low pwr dual ADC 制造商:Analog Devices 功能描述:IC, ADC, 16BIT, 80MSPS, SPI, LFCSP-64; Resolution (Bits):16bit; Sampling Rate:80MSPS; Supply Voltage Type:Single; Supply Voltage Min:1.7V; Supply Voltage Max:1.9V; Supply Current:113mA; Digital IC Case Style:CSP; No. of Pins:64 ;RoHS Compliant: Yes 制造商:Analog Devices 功能描述:CONVERTER - ADC |
| AD9269BCPZRL7-20 | 功能描述:IC ADC 16BIT 20MSPS DL 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9269BCPZRL7-40 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16 Bit 40 Msps low pwr dual ADC RoHS:否 制造商:Analog Devices 通道數(shù)量: 結(jié)構(gòu): 轉(zhuǎn)換速率: 分辨率: 輸入類型: 信噪比: 接口類型: 工作電源電壓: 最大工作溫度: 安裝風格: 封裝 / 箱體: |
發(fā)布緊急采購，3分鐘左右您將得到回復。