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| 型號： | AD9252ABCPZ-50 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/52頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 14BIT SRL 50MSPS 64LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 14 |
| 采樣率（每秒）： | 50M |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 8 |
| 功率耗散（最大）： | 773mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 64-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 64-LFCSP-VQ（9x9） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 16 個單端，單極；8 個差分，單極 |
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Data Sheet
AD9252
Rev. E | Page 33 of 52
EVALUATION BOARD
The AD9252 evaluation board provides all the support cir-
cuitry required to operate the ADC in its various modes and
configurations. The converter can be driven differentially by using
a transformer (default) or an AD8334 driver. The ADC can also be
driven in a single-ended fashion. Separate power pins are provided
to isolate the DUT from the drive circuitry of the AD8334. Each
input configuration can be selected by changing the connections
the typical bench characterization setup used to evaluate the
ac performance of the AD9252. It is critical that the signal sources
used for the analog input and clock have very low phase noise
(<1 ps rms jitter) to realize the optimum performance of the
converter. Proper filtering of the analog input signal to remove
harmonics and lower the integrated or broadband noise at the
input is also necessary to achieve the specified noise performance.
See Figure 62 to Figure 72 for the complete schematics and
layout diagrams demonstrating the routing and grounding
techniques that should be applied at the system level.
POWER SUPPLIES
This evaluation board has a wall-mountable switching power
supply that provides a 6 V, 2 A maximum output. Connect the
supply to the rated 100 V ac to 240 V ac wall outlet at 47 Hz to
63 Hz. The other end of the supply is a 2.1 mm inner diameter
jack that connects to the PCB at P701. Once on the PC board,
the 6 V supply is fused and conditioned before connecting to
three low dropout linear regulators that supply the proper bias
to each of the various sections on the board.
When operating the evaluation board in a nondefault condition,
L701 to L704 can be removed to disconnect the switching
power supply. This enables the user to bias each section of the
board individually. Use P702 to connect a different supply for
each section. At least one 1.8 V supply is needed for AVDD_DUT
and DRVDD_DUT; however, it is recommended that separate
supplies be used for both analog and digital signals and that each
supply have a current capability of 1 A. To operate the evaluation
board using the VGA option, a separate 5.0 V analog supply
(AVDD_5 V) is needed. To operate the evaluation board using
the SPI and alternate clock options, a separate 3.3 V analog supply
(AVDD_3.3 V) is needed in addition to the other supplies.
INPUT SIGNALS
When connecting the clock and analog sources to the
evaluation board, use clean signal generators with low phase
noise, such as Rohde & Schwarz SMA or HP8644 signal generators
or the equivalent, as well as a 1 m, shielded, RG-58, 50 Ω coaxial
cable. Enter the desired frequency and amplitude from the ADC
specifications tables. Typically, most Analog Devices, Inc., evalu-
ation boards can accept approximately 2.8 V p-p or 13 dBm
sine wave input for the clock. When connecting the analog
input source, it is recommended to use a multipole, narrow-band,
band-pass filter with 50 Ω terminations. Good choices of such
band-pass filters are available from TTE, Allen Avionics, and
K&L Microwave, Inc. The filter should be connected directly to
the evaluation board if possible.
OUTPUT SIGNALS
The default setup uses the Analog Devices HSC-ADC-FIFO5-
INTZ to interface with the Analog Devices standard dual-channel
FIFO data capture board (HCS-ADC-EVALCZ). Two of the
eight channels can be evaluated at the same time. For more
information on the channel settings and optional settings of
these boards, visit www.analog.com/FIFO.
ROHDE & SCHWARZ,
SMA,
2V p-p SIGNAL
SYNTHESIZER
ROHDE & SCHWARZ,
SMA,
2V p-p SIGNAL
SYNTHESIZER
BAND-PASS
FILTER
XFMR
INPUT
CLK
CH A TO CH H
14-BIT
SERIAL
LVDS
USB
CONNECTION
AD9252
EVALUATION BOARD
INTERPOSER
BOARD
HSC-ADC-EVALCZ
FIFO DATA
CAPTURE
BOARD
PC
RUNNING
ADC
ANALYZER
AND SPI
USER
SOFTWARE
1.8V
–+
A
V
DD_
DUT
A
V
DD_3
.3V
D
RV
DD_
DUT
GN
D
GN
D
–+
5.0V
GN
D
A
V
DD_5V
1.8V
6V DC
2A MAX
WALL OUTLET
100V AC TO 240V AC
47Hz TO 63Hz
SWITCHING
POWER
SUPPLY
–+
GN
D
3.3V
–+
VC
C
GN
D
3.3V
SPI
0629
6-
035
Figure 58. Evaluation Board Connection
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9252ABCPZ-50 | 制造商:Analog Devices 功能描述:IC, ADC, 14BIT, 50MSPS, LVDS, SERIAL |
| AD9252ABCPZRL7-50 | 功能描述:IC ADC 14BIT SRL 50MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端，雙極 |
| AD9252BCPZ-50 | 制造商:Analog Devices 功能描述:IC ((NW)) 制造商:Analog Devices 功能描述:IC,A/D CONVERTER,OCTAL,14-BIT,LLCC,64PIN |
| AD9252BCPZRL7-50 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal, 14-Bit, 50 MSPS Serial LVDS 1.8 V A/D Converter |
| AD9253 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS |
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