參數(shù)資料
型號: AD9252ABCPZ-50
廠商: Analog Devices Inc
文件頁數(shù): 25/52頁
文件大?。?/td> 0K
描述: IC ADC 14BIT SRL 50MSPS 64LFCSP
標準包裝: 1
位數(shù): 14
采樣率(每秒): 50M
數(shù)據(jù)接口: 串行,SPI?
轉(zhuǎn)換器數(shù)目: 8
功率耗散(最大): 773mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-VFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 64-LFCSP-VQ(9x9)
包裝: 托盤
輸入數(shù)目和類型: 16 個單端,單極;8 個差分,單極
Data Sheet
AD9252
Rev. E | Page 31 of 52
Addr.
(Hex)
Parameter Name
(MSB)
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
(LSB)
Bit 0
Default
Value
(Hex)
Notes/
Comments
14
output_mode
X
0 = LVDS
ANSI-644
(default)
1 = LVDS
low power,
(IEEE1596.3
similar)
X
Output
invert
1 = on
0 = off
(default)
00 = offset binary
(default)
01 = twos complement
0x00
Configures the
outputs and the
format of the data.
15
output_adjust
X
Output driver
termination
00 = none (default)
01 = 200
10 = 100
11 = 100
X
DCO and
FCO
2× drive
strength
1 = on
0 = off
(default)
0x00
Determines
LVDS or other
output properties.
Primarily func-
tions to set the
LVDS span and
common-mode
levels in place of
an external
resistor.
16
output_phase
X
0011 = output clock phase adjust
(0000 through 1010)
0000 = 0° relative to data edge
0001 = 60° relative to data edge
0010 = 120° relative to data edge
0011 = 180° relative to data edge (default)
0101 = 300° relative to data edge
0110 = 360° relative to data edge
1000 = 480° relative to data edge
1001 = 540° relative to data edge
1010 = 600° relative to data edge
1011 to 1111 = 660° relative to data edge
0x03
On devices that
utilize global
clock divide,
this register
determines
which phase
of the divider
output is used
to supply the
output clock.
Internal latching
is unaffected.
19
user_patt1_lsb
B7
B6
B5
B4
B3
B2
B1
B0
0x00
User-defined
pattern, 1 LSB.
1A
user_patt1_msb
B15
B14
B13
B12
B11
B10
B9
B8
0x00
User-defined
pattern, 1 MSB.
1B
user_patt2_lsb
B7
B6
B5
B4
B3
B2
B1
B0
0x00
User-defined
pattern, 2 LSB.
1C
user_patt2_msb
B15
B14
B13
B12
B11
B10
B9
B8
0x00
User-defined
pattern, 2 MSB.
21
serial_control
LSB first
1 = on
0 = off
(default)
X
<10
MSPS,
low
encode
rate
mode
1 = on
0 = off
(default)
000 = 14 bits (default, normal bit
stream)
001 = 8 bits
010 = 10 bits
011 = 12 bits
100 = 14 bits
0x00
Serial stream
control. Default
causes MSB first
and the native
bit stream
(global).
22
serial_ch_stat
X
Channel
output
reset
1 = on
0 = off
(default)
Channel
power-
down
1 = on
0 = off
(default)
0x00
Used to power
down individual
sections of a
converter (local).
1
X = an undefined feature.
相關(guān)PDF資料
PDF描述
MAX485CUA+ IC TXRX RS485/RS422 8-UMAX
LTC2299CUP#PBF IC ADC DUAL 14BIT 80MSPS 64QFN
VE-2WY-MV CONVERTER MOD DC/DC 3.3V 99W
VE-21M-IW-F2 CONVERTER MOD DC/DC 10V 100W
VE-2WX-MX CONVERTER MOD DC/DC 5.2V 75W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD9252ABCPZ-50 制造商:Analog Devices 功能描述:IC, ADC, 14BIT, 50MSPS, LVDS, SERIAL
AD9252ABCPZRL7-50 功能描述:IC ADC 14BIT SRL 50MSPS 64LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標準包裝:1 系列:- 位數(shù):14 采樣率(每秒):83k 數(shù)據(jù)接口:串行,并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP(0.600",15.24mm) 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個單端,雙極
AD9252BCPZ-50 制造商:Analog Devices 功能描述:IC ((NW)) 制造商:Analog Devices 功能描述:IC,A/D CONVERTER,OCTAL,14-BIT,LLCC,64PIN
AD9252BCPZRL7-50 制造商:AD 制造商全稱:Analog Devices 功能描述:Octal, 14-Bit, 50 MSPS Serial LVDS 1.8 V A/D Converter
AD9253 制造商:AD 制造商全稱:Analog Devices 功能描述:Quad, 14-Bit, 80 MSPS/105 MSPS/125 MSPS