參數(shù)資料
型號(hào): AD9228
廠商: Analog Devices, Inc.
英文描述: Quad, 12-bit, 40/65 MSPS Serial LVDS 1.8 V A/D Converter
中文描述: 四,12位,六十五分之四十○MSPS的串行LVDS 1.8弗吉尼亞州/ D轉(zhuǎn)換器
文件頁數(shù): 3/52頁
文件大小: 1659K
代理商: AD9228
AD9228
SPECIFICATIONS
AVDD = 1.8 V, DRVDD = 1.8 V, 2 V p-p differential input, 1.0 V internal reference, AIN = 0.5 dBFS, unless otherwise noted.
Table 1.
Parameter
1
Temperature
RESOLUTION
ACCURACY
No Missing Codes
Full
Offset Error
Full
Offset Matching
Full
Gain Error
Full
Gain Matching
Full
Differential Nonlinearity (DNL)
Full
Integral Nonlinearity (INL)
Full
TEMPERATURE DRIFT
Offset Error
Full
Gain Error
Full
Reference Voltage (1 V Mode)
Full
REFERENCE
Output Voltage Error (VREF = 1 V)
Full
Load Regulation @ 1.0 mA (VREF = 1 V)
Full
Input Resistance
Full
ANALOG INPUTS
Differential Input Voltage Range (VREF = 1 V)
Full
Common-Mode Voltage
Full
Differential Input Capacitance
Full
Analog Bandwidth, Full Power
Full
POWER SUPPLY
AVDD
Full
DRVDD
Full
IAVDD
Full
IDRVDD
Full
Total Power Dissipation (Including Output Drivers)
Full
Power-Down Dissipation
Full
Standby Dissipation
2
Full
CROSSTALK
Full
CROSSTALK (Overrange Condition)
3
Full
1
See the
AN-835 Application Note
, “Understanding High Speed ADC Testing and Evaluation,” for a complete set of definitions and how these tests were completed.
2
Can be controlled via SPI.
3
Overrange condition is specific with 6 dB of the full-scale input range.
Rev. 0 | Page 3 of 52
AD9228-40
Typ
Guaranteed
±1
±2
±0.4
±0.3
±0.25
±0.4
±2
±17
±21
±2
3
6
2
AVDD/2
7
315
1.8
1.8
155
31
335
2
72
100
100
AD9228-65
Typ
Guaranteed
±1
±2
±2
±0.3
±0.3
±0.4
±2
±17
±21
±2
3
6
2
AVDD/2
7
315
1.8
1.8
232
34
478
2
72
100
100
Unit
Bits
mV
mV
% FS
% FS
LSB
LSB
ppm/°C
ppm/°C
ppm/°C
mV
mV
V p-p
V
pF
MHz
V
V
mA
mA
mW
mW
mW
dB
dB
Min
12
Max
Min
12
Max
1.7
1.7
±8
±8
±1.2
±0.7
±0.5
±1
±30
1.9
1.9
170
34
367
5.8
1.7
1.7
±8
±8
±3.5
±0.7
±0.65
±1
±30
1.9
1.9
245
38
510
5.8
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