- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄373957 > AD9042CHIPS (ANALOG DEVICES INC) 12-Bit, 41 MSPS Monolithic A/D Converter PDF資料下載
參數(shù)資料
| 型號： | AD9042CHIPS |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | 12-Bit, 41 MSPS Monolithic A/D Converter |
| 中文描述： | 1-CH 12-BIT PROPRIETARY METHOD ADC, PARALLEL ACCESS, UUC31 |
| 封裝： | DIE-31 |
| 文件頁數(shù)： | 22/24頁 |
| 文件大小： | 488K |
| 代理商： | AD9042CHIPS |
AD9042
–22–
REV. A
AD9042
NOISE SOURCE
(REF. FIGURE 53)
LPF
FROM
RF/IF
AIN
V
OFFSET
V
REF
Figure 54. Using the AD9042 with Dither
Receiver E xample
T o determine how the ADC performance relates to overall
receiver sensitivity, the simple receiver in Figure 55 will be
examined. T his example assumes that the overall down
conversion process can be grouped into one set of specifications,
instead of individually examining all components within the
system and summing them together. Although a more detailed
analysis should be employed in a real design, this model will
provide a good approximation.
In examining a wideband digital receiver, several considerations
must be applied. Although other specifications are important,
receiver sensitivity determines the absolute limits of a radio
excluding the effects of other outside influences. Assuming that
receiver sensitivity is limited by noise and not adjacent signal
strength, several sources of noise can be identified and their
overall contribution to receiver sensitivity calculated.
RF/IF
AD9042
CHANNELIZER
REF IN
DSP
ENC
40.96MHz
GAIN = 30dB
NF = 20dB
BW =12.5MHz
SINGLE CHANNEL
BW = 30kHz
Figure 55. Receiver Analysis
T he first noise calculation to make is based on the signal band-
width at the antenna. In a typical broadband cellular receiver,
the IF bandwidth is 12.5 MHz. Given that the power of noise
in a given bandwidth is defined by
P
n
= kTB
, where
B
is
bandwidth,
k
= 1.38
×
10
–23
is Boltzman’s constant and
T
= 300
k
is absolute temperature, this gives an input noise
power of 5.18
×
10
–14
watts or –102.86 dBm. If our receiver
front end has a gain of 30 dB and a noise figure of 20 dB, then
the total noise presented to the ADC input becomes –52.86dBm
(–102.86 + 30 + 20) or 0.51 mV rms. Comparing receiver
noise to dither required for good SFDR, we see that in this
example, our receiver supplies about 10% of the dither required
for good SFDR.
Based on a typical ADC SNR specification of 68 dB, the
equivalent internal converter noise is 0.140 mV rms. T herefore
total broadband noise is 0.529 mV rms. Before processing gain,
this is an equivalent SNR (with respect to full scale) of 56.5 dB.
Assuming a 30 kHz AMPS signal and a sample rate of
40.96 MSPS, the SNR through processing gain is increased by
28.3 dB to 84.8 dB. However, if 8 strong and equal signals are
present in the ADC bandwidth, then each must be placed 18 dB
below full scale to prevent ADC overdrive. In addition, 3 dB to
15 dB should be used for ADC headroom should another signal
come in-band unexpectedly. For this example, 12 dB of
headroom will be allocated. T herefore we give away 30 dB of
range and reduce the carrier-to-noise ratio (C/N)* to 54.8 dB.
Assuming that the C/N ratio must be 6 dB or better for accurate
demodulation, one of the eight signals may be reduced by 48.8dB
before demodulation becomes unreliable. At this point, the
input signal power would be 40.6
μ
V rms on the ADC input or
–74.8 dBm. Referenced to the antenna, this is –104.8 dBm.
T o improve sensitivity, several things can be done. First, the
noise figure of the receiver can be reduced. Since front end
noise dominates the 0.529 mV rms, each dB reduction in noise
figure translates to an additional dB of sensitivity. Second, pro-
viding broadband AGC can improve sensitivity by the range of
the AGC. However, the AGC would only provide useful im-
provements if all in-band signals are kept to an absolute minimal
power level so that AGC can be kept near the maximum gain.
T his noise limited example does not adequately demonstrate the
true limitations in a wideband receiver. Other limitations such
as SFDR are more restrictive than SNR and noise. Assume that
the analog-to-digital converter has an SFDR specification of
–80 dBFS or –76 dBm (Full scale = +4 dBm). Also assume
that a tolerable carrier-to-interferer (C/I)** (different from C/N)
ratio is 18 dB. T his means that the minimum signal level is
–62 dBFS (–80 plus 18) or –58 dBm. At the antenna, this is
–88 dBm. T herefore, as can be seen, SFDR (single or multi-
tone) would limit receiver performance in this example.
However, as shown previously, SFDR can be greatly improved
through the use of dither (Figures 22, 25). In many cases, the
addition of the out-of-band dither can improve receiver
sensitivity nearly to that limited by thermal noise.
Multitone Performance
T he plot below shows the AD9042 in a worst case scenario of
four strong tones spaced fairly close together. In this plot no
dither was used, and the converter still maintained 85 dBFS of
spurious-free range. As illustrated previously, a modest amount
of dither introduced out-of-band could be used to lower the
nonlinear components.
FREQUENCY – MHz
0
–80
–120
–40
–100
–20
–60
dc
20.5
4.1
P
8.2
12.3
16.4
ENCODE = 41 MSPS
3
6
9
7
4
2
5
8
Figure 56. Multitone Performance
*
*C/N is the ratio of signal to inband noise.
**C/I is the ratio of signal to inband interferer.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AD9042 | 12-Bit, 41 MSPS Monolithic A/D Converter(41MSPS,單片12位A/D轉(zhuǎn)換器) |
| AD9048JJ | Monolithic 8-Bit Video A/D Converter |
| AD9048JQ | CAPACITOR, 0805 4.7NF 50V CAPACITOR, 0805 4.7NF 50V; CAPACITANCE:4700PF; VOLTAGE RATING, DC:50V; CAPACITOR DIELECTRIC TYPE:CERAMIC MULTI-LAYER; SERIES:B37941; TOLERANCE, :10%; TOLERANCE, -:10%; TEMP, OP. MAX:125(DEGREE C); TEMP, OP. RoHS Compliant: Yes |
| AD9048KJ | Monolithic 8-Bit Video A/D Converter |
| AD9048SE | Monolithic 8-Bit Video A/D Converter |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD9042D | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042D/PCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
| AD9042DPCB | 制造商:AD 制造商全稱:Analog Devices 功能描述:12-Bit, 41 MSPS Monolithic A/D Converter |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。