VCC = VTTI
參數(shù)資料
型號(hào)： AD8155ACPZ-R7
廠商： Analog Devices Inc
文件頁數(shù)： 23/36頁
文件大?。?/td> 0K
描述： IC MUX/DEMUX DUAL BUFFER 64LFCSP
標(biāo)準(zhǔn)包裝： 750
系列： XStream™
功能： 多路復(fù)用器/多路分解器
電路： 2 x 2:1
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 1.6 V ~ 3.6 V
電流 - 電源： 735mA
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤，CSP
供應(yīng)商設(shè)備封裝： 64-LFCSP-VQ（9x9）
包裝： 帶卷 (TR)
AD8155
Rev. 0 | Page 3 of 36
SPECIFICATIONS
VCC = VTTI = VTTO = 1.8 V, DVCC = 3.3 V, VEE = 0 V, RL = 50 Ω, basic configuration1, data rate = 6.5 Gbps, data pattern = PRBS7, ac-
coupled inputs and outputs, differential input swing = 800 mV p-p, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
Conditions
Min
Typ
Max
Unit
DYNAMIC PERFORMANCE
Data Rate/Channel (NRZ)
DC
6.5
Gbps
Deterministic Jitter (No
Channel)
Data rate = 6.5 Gbps, EQ setting = 0
22
ps p-p
Random Jitter (No Channel)
RMS, data rate = 6.5 Gbps
1
ps
Residual Deterministic Jitter
with Receive Equalization
Data rate 6.5 Gbps, 20 inch FR4
30
ps p-p
Data rate 6.5 Gbps, 40 inch FR4
40
ps p-p
Residual Deterministic Jitter
with Transmit Preemphasis
Data rate 6.5 Gbps, 10 inch FR4
35
ps p-p
Data rate 6.5 Gbps, 30 inch FR4
42
ps p-p
Propagation Delay
50% input to 50% output (maximum EQ)
700
ps
Lane-to-Lane Skew
Signal path and switch architecture is balanced
and symmetric (maximum EQ)
90
ps
Switching Time
50% logic switching to 50% output data
150
ns
Output Rise/Fall Time
20% to 80% (PE = lowest setting)
62
ps
INPUT CHARACTERISTICS
Differential Input Voltage
Swing
VICM2 = VCC 0.6 V, VCC = VMIN to VMAX, TA = TMIN to
TMAX,
LOS control register = 0x05
200
2000
mV p-p
diff
Input Voltage Range
Single-ended absolute voltage level, VL minimum
VEE + 0.6
V
Single-ended absolute voltage level, VH maximum
VCC + 0.3
V
OUTPUT CHARACTERISTICS
Output Voltage Swing
Differential, PE = 0, default output level, @ dc
590
725
820
mV p-p
diff
Output Voltage Range, Single-
Ended Absolute Voltage Level
TX_HEADROOM = 0, VL minimum
VCC 1.1
V
TX_HEADROOM = 0, VH maximum
VCC + 0.6
V
TX_HEADROOM = 1, VL minimum
VCC 1.3
V
TX_HEADROOM = 1, VH maximum
VCC + 0.6
V
Output Current
Port A/B/C, PE_A/B/C = minimum
16
mA
Port A/B/C, PE_A/B/C = 6 dB, VOD = 800 mV p-p
32
mA
TERMINATION CHARACTERISTICS
Resistance
Differential, VCC = VMIN to VMAX, TA = TMIN to TMAX
90
100
110
Ω
LOS CHARACTERISTICS
DC Assert Level
50
mV p-p
diff
DC Deassert Level
300
mV p-p
diff
LOS to Output Squelch
LOS control = 0, VID = 0 to 50% OP/ON settling,
VCC = 1.8 V
21
ns
LOS to Output Enable
LOS control = 0, data present to first valid
transition, VCC = 1.8 V
67
ns
POWER SUPPLY
Operating Range
VCC
VEE = 0 V, TX_HEADROOM = 0
1.6
1.8 to 3.3
3.6
V
VEE = 0 V, TX_HEADROOM = 1
2.2
3.3
3.6
V
DVCC
DVCC ≥ VCC, VEE = 0 V
1.6
1.8 to 3.3
3.6
V
VTTI
1.2
VCC + 0.3
V
VTTO
1.2
VCC + 0.3
V
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