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參數(shù)資料
| 型號(hào)： | AD8134ACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/20頁 |
| 文件大小： | 0K |
| 描述： | IC OPAMP DIFF TRPL LDIST 24LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 放大器類型： | 差分 |
| 電路數(shù)： | 3 |
| 輸出類型： | 差分 |
| 轉(zhuǎn)換速率： | 1600 V/µs |
| -3db帶寬： | 450MHz |
| 電流 - 輸入偏壓： | 67µA |
| 電壓 - 輸入偏移： | 4000µV |
| 電流 - 電源： | 31mA |
| 電流 - 輸出 / 通道： | 90mA |
| 電壓 - 電源，單路/雙路(±)： | 4.5 V ~ 12 V，±2.25 V ~ 6 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 24-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 24-LFCSP-VQ（4x4） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD8134ACPZ-REEL7DKR |
AD8134
Rev. A | Page 14 of 20
SYNC-ON-COMMON-MODE
On a single 5 V supply, the sync-on-common-mode circuit can
be used by directly applying the HSYNC and VSYNC signals to the
respective AD8134 inputs. The logic thresholds of the HSYNC and
VSYNC inputs are nominally set at (VS+ VS)/4, using a resistor
divider with an impedance of approximately 200 kΩ. This
allows the inputs to be driven beyond the rails without logic
inversion and maintains fast switching speeds. The robustness
of the HSYNC and VSYNC inputs therefore allows them to be driven
directly off the output of a computer video card without concern of
overdriving the inputs. The input path from HSYNC and VSYNC
inputs to the switches in the current mode level-shifting circuit
are well matched to eliminate false switching transients. This
maximizes common-mode balance and minimizes radiated
energy.
The AD8134 drives RGB video signals over UTP cable. The
balance of the differential outputs is trimmed to ensure low
radiated energy from each of the twisted pairs. The common-
mode outputs of each of the R, G, and B differential outputs
are set using the circuit in Figure 32. This circuit embeds the
horizontal and vertical sync pulses on the three common-mode
outputs in a way that also results in low radiated energy. For a
more detailed description of the sync scheme, see the
Applications section.
The sync-on-common-mode circuit generates a current based
on the SYNC LEVEL input pin (Pin 18). With SYNC LEVEL
input tied to VS, the common-mode output of all drivers is set
at (VS+ + VS)/2. Using a resistor divider, a voltage can be
applied between VS and SYNC LEVEL that determines the
maximum deviation of the common-mode outputs from their
midsupply level. If, for instance, SYNC LEVEL VS = 0.5 V
and the supply voltage is 5 V, then the common-mode outputs
fall within an envelope of 2.5 V ± 0.5 V. The state of each VOUT, cm
output based on the HSYNC and VSYNC inputs is determined by
the equations defined in the Applications section.
The sync-on-common-mode circuit can be used with ±5 V
supplies, but in this case, the HSYNC and VSYNC logic signals
require level-shifting. Level-shifting details are provided in the
Applications section.
H
V
H
HR
R
H
V
VS–
BLUE VOCM
SYNC LEVEL
HSYNC
VSYNC
VS+
H
V
H
R
V
MIRROR
V
RED VOCM
GREEN VOCM
04770-007
Figure 32. Sync-On-Common-Mode Simplified Circuit
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