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參數(shù)資料
| 型號(hào)： | AD7986BCPZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 10/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 18BIT 2MSPS SAR 20LFCSP |
| 產(chǎn)品培訓(xùn)模塊： | Motor Control |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 18 |
| 采樣率（每秒）： | 2M |
| 數(shù)據(jù)接口： | MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 34mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 20-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 20-LFCSP-VQ |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 1 個(gè)差分，雙極 |
| 產(chǎn)品目錄頁面： | 780 (CN2011-ZH PDF) |
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AD7986
Rev. B | Page 18 of 28
DATA READING OPTIONS
There are three different data reading options for the AD7986.
There is the option to read during conversion, to split the read
across acquisition and conversion (see Figure 27 and Figure 28),
and in normal mode, to read during acquisition. The desired
SCK frequency largely determines which reading option to
pursue.
Reading During Conversion, Fast Hosts (Turbo or
Normal Mode)
When reading during conversion (n), conversion results are for
the previous (n 1) conversion. Reading should only occur up
to tDATA and, because this time is limited, the host must use a
fast SCK.
The required SCK frequency is calculated by
DATA
SCK
t
Edges
SCK
Number
f
_
≥
To determine the SCK frequency, follow these examples to read
data from conversion (n 1).
Turbo mode (2 MSPS):
Number_SCK_Edges = 18; tDATA = 200 ns
fSCK = 18/200 ns = 90 MHz
Normal mode (1.5 MSPS):
Number_SCK_Edges = 18; tDATA = 300 ns
fSCK = 18/300 ns = 60 MHz
The time between tDATA and tCONV is an I/O quiet time where
digital activity should not occur, or sensitive bit decisions may
be corrupt.
Split-Reading, Any Speed Host (Turbo or Normal Mode)
To allow for slower SCK, there is the option of a split read where
data access starts at the current acquisition (n) and spans into the
conversion (n). Conversion results are for the previous (n 1)
conversion.
Similar to reading during conversion, split-reading should only
occur up to tDATA. For the maximum throughput, the only time
restriction is that split-reading take place during the tACQ
(minimum) + tDATA tQUIET time. The time between the falling
edge of SCK and CNV rising is an acquisition quiet time, tQUIET.
To determine how to split the read for a particular SCK frequency,
follow these examples to read data from conversion (n 1).
For turbo mode (2 MSPS),
fSCK = 65 MHz; tDATA = 200 ns
Number_SCK_Edges = 65 MHz × 200 ns = 13
Thirteen bits are read during conversion (n), and five bits are
read during acquisition (n).
For normal mode (1.5 MSPS),
fSCK = 50 MHz; tDATA = 300 ns
Number_SCK_Edges = 50 MHz × 300 ns = 15
Fifteen bits are read during conversion (n), and three bits are
read during acquisition (n).
For slow throughputs, the time restriction is dictated by the
user’s required throughput, and the host is free to run at any
speed. Similar to the reading during acquisition, for slow hosts,
the data access must take place during the acquisition phase
with additional time into the conversion.
Note that data access spanning conversion requires the CNV to
be driven high to initiate a new conversion, and data access is
not allowed when CNV is high. Thus, the host must perform
two bursts of data access when using this method.
Reading During Acquisition, Any Speed Hosts (Turbo or
Normal Mode)
When reading during acquisition (n), conversion results are
for the previous (n 1) conversion. Maximum throughput is
achievable in normal mode (1.5 MSPS); however, in turbo
mode, 2 MSPS throughput is not achievable.
For the maximum throughput, the only time restriction is that
the reading takes place during the tACQ (minimum) time. For
slow throughputs, the time restriction is dictated by throughput
required by the user, and the host is free to run at any speed.
Thus for slow hosts, data access must take place during the
acquisition phase.
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| AD7986BCPZ-RL7 | 功能描述:IC ADC 18BIT 2MSPS SAR 20LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率（每秒）:83k 數(shù)據(jù)接口:串行，并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP（0.600"，15.24mm） 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端，雙極 |
| AD7986BCPZ-U1 | 制造商:Analog Devices 功能描述:16-BIT, 10MSPS PULSAR DIFFERENTIAL ADC - Rail/Tube |
| AD7986XCPZ-U1 | 制造商:Analog Devices 功能描述:16-BIT, 10MSPS PULSAR DIFFERENTIAL ADC - Rail/Tube |
| AD7988-1 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit Lower Power |
| AD7988-1_1208 | 制造商:AD 制造商全稱:Analog Devices 功能描述:16-Bit Lower Power PulSAR ADCs in MSOP/LFCSP (QFN) |
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