參數(shù)資料
型號(hào): AD7939BCP
廠商: ANALOG DEVICES INC
元件分類: ADC
英文描述: 8-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
中文描述: 8-CH 10-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, QCC32
封裝: MO-220-VHHD-2, LFCSP-32
文件頁數(shù): 11/32頁
文件大小: 1332K
代理商: AD7939BCP
AD7938/AD7939
Preliminary Technical Data
TERMINOLOGY
Integral Nonlinearity
This is the maximum deviation from a straight line passing
through the endpoints of the ADC transfer function. The
endpoints of the transfer function are zero scale, a point 1 LSB
below the first code transition, and full scale, a point 1 LSB
above the last code transition.
Negative Gain Error Match
This is the difference in negative gain error between any two
channels.
Channel-to-Channel Isolation
Channel-to-channel isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale sine wave signal to all seven nonselected input channels
and applying a 50 kHz signal to the selected channel. The
channel-to-channel isolation is defined as the ratio of the power
of the 50 kHz signal on the selected channel to the power of the
noise signal that appears in the FFT of this channel.
Differential Nonlinearity
This is the difference between the measured and the ideal 1 LSB
change between any two adjacent codes in the ADC.
Offset Error
This is the deviation of the first code transition (00 . . .000) to
(00 . . . 001) from the ideal, i.e., AGND + 1 LSB.
Power Supply Rejection Ratio (PSRR)
PSRR is defined as the ratio of the power in the ADC output at
full-scale frequency,
f
, to the power of a 100 mV p-p sine wave
applied to the ADC V
DD
supply of frequency f
S
. The frequency
of the input varies from 1 kHz to 1 MHz.
Offset Error Match
This is the difference in offset error between any two channels.
Gain Error
This is the deviation of the last code transition (111 . . .110) to
(111 . . . 111) from the ideal (i.e., V
REF
– 1 LSB) after the offset
error has been adjusted out.
PSRR
(dB) = 10log(
Pf/Pf
S
)
Pf
is the power at frequency
f
in the ADC output;
Pf
S
is the
power at frequency f
S
in the ADC output.
Gain Error Match
This is the difference in gain error between any two channels.
Track-and-Hold Acquisition Time
The track-and-hold amplifier returns into track mode at the
end of conversion. The track-and-hold acquisition time is the
time required for the output of the track-and-hold amplifier to
reach its final value, within ±1/2 LSB, after the end of
conversion.
Zero-Code Error
This applies when using the twos complement output coding
option, in particular to the 2 × V
REF
input range with V
REF
to
+V
REF
biased about the V
REFIN
point. It is the deviation of the
mid scale transition (all 0s to all 1s) from the ideal V
IN
voltage,
i.e., V
REF
.
Signal-to-(Noise + Distortion) Ratio (SINAD)
This is the measured ratio of signal-to-(noise + distortion) at
the output of the A/D converter. The signal is the rms amplitude
of the fundamental. Noise is the sum of all nonfundamental
signals up to half the sampling frequency (f
S
/2), excluding dc.
The ratio is dependent on the number of quantization levels in
the digitization process; the more levels, the smaller the
quantization noise. The theoretical signal-to-(noise +
distortion) ratio for an ideal N-bit converter with a sine wave
input is given by
Zero-Code Error Match
This is the difference in zero-code error between any two
channels.
Positive Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × V
REF
input range with V
REF
to
+V
REF
biased about the V
REFIN
point. It is the deviation of the last
code transition (011. . .110) to (011 .. . 111) from the ideal (i.e.,
+V
REF
1 LSB) after the zero-code error has been adjusted out.
Signal-to-
(
Noise + Distortion
)
= (6.02
N
+ 1.76) dB
Positive Gain Error Match
This is the difference in positive gain error between any two
channels.
Thus, for a 12-bit converter, this is 74 dB, and for a 10-bit
converter, this is 62 dB.
Negative Gain Error
This applies when using the twos complement output coding
option, in particular to the 2 × V
REF
input range with
V
REF
to
+V
REF
biased about the V
REF
point. It is the deviation of the first
code transition (100 . . . 000) to (100 . . . 001) from the ideal (i.e.,
V
REFIN
+ 1 LSB) after the zero-code error has been adjusted
out.
Rev. PrN | Page 11 of 32
相關(guān)PDF資料
PDF描述
AD7939BSU 8-Channel, 1.5 MSPS, 12-Bit and 10-Bit Parallel ADCs with a Sequencer
AD8001ART 800 MHz 50 mW Current Feedback Amplifier(222.93 k)
AD8001ACHIPS MB 4C 4#12 SKT PLUG
AD8001AN 800 MHz, 50 mW Current Feedback Amplifier
AD8001AQ 800 MHz, 50 mW Current Feedback Amplifier
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7939BCP-REEL 制造商:Analog Devices 功能描述:ADC SGL SAR 1.5MSPS 10-BIT PARALLEL 32LFCSP EP - Tape and Reel
AD7939BCP-REEL7 制造商:Analog Devices 功能描述:ADC Single SAR 1.5Msps 10-bit Parallel 32-Pin LFCSP EP T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 1.5MSPS 10-BIT PARALLEL 32LFCSP EP - Tape and Reel
AD7939BCPZ 功能描述:IC ADC 10BIT 8CH PARALL 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率(每秒):45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散(最大):315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC(0.295",7.50mm 寬) 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端,單極
AD7939BCPZ-REEL7 功能描述:IC ADC 10BIT 8CH PARALL 32LFCSP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):16 采樣率(每秒):45k 數(shù)據(jù)接口:串行 轉(zhuǎn)換器數(shù)目:2 功率耗散(最大):315mW 電壓電源:模擬和數(shù)字 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:28-SOIC(0.295",7.50mm 寬) 供應(yīng)商設(shè)備封裝:28-SOIC W 包裝:帶卷 (TR) 輸入數(shù)目和類型:2 個(gè)單端,單極
AD7939BSU 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: