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參數(shù)資料
| 型號： | AD7884BQ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 3/16頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 16BIT SAMPLING HS 40-CDIP |
| 產(chǎn)品變化通告： | Product Discontinuance 27/Oct/2011 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 16 |
| 采樣率（每秒）： | 166k |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 2 |
| 功率耗散（最大）： | 325mW |
| 電壓電源： | 雙 ± |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 通孔 |
| 封裝/外殼： | 40-CDIP（0.600"，15.24mm） |
| 供應(yīng)商設(shè)備封裝： | 40-Cerdip |
| 包裝： | 管件 |
| 輸入數(shù)目和類型： | 1 個差分，雙極 |
REV. E
AD7884/AD7885
–11–
AD7884/AD7885 PERFORMANCE
Linearity
The linearity of the AD7884/AD7885 is determined by the
on-chip 16-bit D/A converter. This is a segmented DAC that is
laser trimmed for 16-bit DNL performance to ensure that there
are no missing codes in the ADC transfer function. Figure 13
shows a typical INL plot for the AD7884/AD7885.
0
16384
32768
49152
65535
OUTPUT CODE
0
0.5
1.0
1.5
2.0
LINEARITY
ERROR
–
LSBs
VDD = +5V
VSS = –5V
TA = 25 C
Figure 13. AD7884/AD7885 Typical Linearity Performance
Noise
In an A/D converter, noise exhibits itself as code uncertainty in
dc applications and as the noise floor (in an FFT, for example)
in ac applications.
In a sampling A/D converter like the AD7884/AD7885, all
information about the analog input appears in the baseband
from dc to 1/2 the sampling frequency. An antialiasing filter will
remove unwanted signals above fS/2 in the input signal, but the
converter wideband noise will alias into the baseband. In the
AD7884/AD7885, this noise is made up of sample-and-hold noise
and A/D converter noise. The sample-and-hold section contrib-
utes 51
V rms and the ADC section contributes 59 V rms.
These add up to a total rms noise of 78
V. This is the input
referred noise in the
±3 V analog input range. When operating
in the
±5 V input range, the input gain is reduced to –0.6. This
means that the input referred noise is now increased by a factor
of 1.66 to 120
V rms.
Figure 14 shows a histogram plot for 5000 conversions of a dc
input using the AD7884/AD7885 in the
±5 V input range. The
analog input was set as close as possible to the center of a code
transition. All codes other than the center code are due to the
ADC noise. In this case, the spread is six codes.
3000
0
2000
1000
CODE
FREQUENCY
(X – 2)
(X – 1)
(X)
(X + 1)
(X + 2)
(X + 3)
CODE
Figure 14. Histogram of 5000 Conversions of a DC Input
If the noise in the converter is too high for an application, it can
be reduced by oversampling and digital filtering. This involves
sampling the input at a higher than the required word rate
and then averaging to arrive at the final result. The very fast
conversion time of the AD7884/AD7885 makes it very
suitable for oversampling. For example, if the required input
bandwidth is 40 kHz, the AD7884/AD7885 could be
oversampled by a factor of 2. This yields a 3 dB
improvement in the effective SNR performance. The noise
performance in the
±5 V input range is now effectively 85 V rms,
and the resultant spread of codes for 2500 conversions will be four.
This is shown in Figure 15.
1500
0
1000
500
CODE
FREQUENCY
(X – 1)
(X)
(X + 1)
(X + 2)
CODE
Figure 15. Histogram of 2500 Conversions of a DC Input
Using a
×2 Oversampling Ratio
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD7885ABP | 制造商:Rochester Electronics LLC 功能描述:16-BIT,BYTE O/P SAMPL.A/D - Bulk 制造商:Analog Devices 功能描述: |
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