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參數(shù)資料
| 型號： | AD7877WACPZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 20/45頁 |
| 文件大小： | 0K |
| 描述： | IC CTRLR TOUCH SCREEN 32LFCSP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 類型： | 電阻 |
| 觸摸面板接口： | 4 線 |
| 輸入數(shù)/鍵： | 1 TSC |
| 分辨率（位）： | 12 b |
| 評估套件： | 可供 |
| 數(shù)據(jù)接口： | 串行，SPI? |
| 數(shù)據(jù)速率/采樣率 (SPS，BPS)： | 125k |
| 電壓基準(zhǔn)： | 外部，內(nèi)部 |
| 電源電壓： | 2.7 V ~ 5.25 V |
| 電流 - 電源： | 1µA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 32-VFQFN 裸露焊盤，CSP |
| 供應(yīng)商設(shè)備封裝： | 32-LFCSP-VQ（5x5） |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 其它名稱： | AD7877WACPZ-REEL7DKR |
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AD7877
Data Sheet
Rev. D | Page 26 of 44
8-BIT DAC
The AD7877 features an on-chip 8-bit DAC for LCD contrast
control. The DAC can be configured for voltage output by
clearing Bit 2 of the DAC register (Address 1110b), or for
current output by setting this bit.
The output voltage range can be set to 0 to VCC/2 by clearing
Bit 0 of the DAC register, or to 0 to VCC by setting this bit. In
current mode, the output range is selectable by an external
resistor, RRNG, connected between the ARNG pin and GND.
This sets the full-scale output current according to the following
equations:
IFS = VCC/(RRNG × 6)
therefore,
RRNG = VCC/(IFS × 6)
(5)
In current mode, the DAC sinks current, that is, positive
current flows into ground. The maximum output current is
1000 A. The DAC is updated by writing to Address 1110b of
the DAC register. The 8 MSBs of the data-word are used for
DAC data.
The most effective way to control LCD contrast with the DAC is
to use it to control the feedback loop of the dc-to-dc converter
that supplies the LCD bias voltage, as shown in Figure 45. The
bias voltage for graphic LCDs is typically in the range of 20 V to
25 V, and the dc-to-dc converter usually has a feedback loop
that attenuates the output voltage and compares it with an
internal reference voltage.
03796-
023
DC-DC
CONVERTER
VFB
VOUT
TO LCD
8-BIT
DAC
AD7877
ARNG
RRNG1
GND
NOTES:
1RRNG IS REQUIRED ONLY IF DAC IS IN CURRENT MODE.
2R1 IS REQUIRED ONLY IF DAC IS IN VOLTAGE MODE.
AOUT
R12
IOUT
R3
R2
COMP
VREF
Figure 45. Using the DAC to Adjust LCD Contrast
The circuit operates as follows. If the DAC is in current mode
when the DAC output is zero, it has no effect on the feedback
loop. Regardless of what the DAC does, the feedback loop
maintains the voltage across R4, VFB, equal to VREF, and the
output voltage, VOUT, is
VREF × (R2 + R3)/R3
As the DAC output is increased, it increases the feedback current,
so the voltage across R2 and, therefore, the output voltage also
increase. Note that the voltage across R3 does not change. This
is important for calculation of the adjustment range.
In current mode, it is quite easy to calculate the resistor values
to give the required adjustment range in VOUT using the
following steps:
1. Find the required maximum and minimum values of VOUT
from the LCD manufacturer’s data
2. Decide on the current around the feedback loop. For
reasonable accuracy of the output voltage, this current
should be at least 100 times the input bias current of the
dc-to-dc converter’s comparator
3. Calculate R3 using the following equation:
R3 = VFB/IFB = VREF/IFB
4. Calculate R2 for the minimum value of VOUT, when the
DAC has no effect
R2 = R3(VOUT(MIN) VREF)/VREF
5. Because the voltage across R3 does not change, subtract
VREF from VOUTMAX and VOUTMIN to get the maximum and
minimum voltages across R2
6. Calculate the change in feedback current between
minimum and maximum output voltages
I = VR2(MAX)/R2 VR2(MIN)/R2
This is the required full-scale current of the DAC.
7. Calculate RRNG from Equation 5
Example:
1. VCC = 5 V
VOUT(MIN) is 20 V and VOUT(MAX) is 25 V
VREF is 1.25 V
2. Allow 100 A around the feedback loop.
3. R3 = 1.25 V/100 A = 12.5 k
Use the nearest preferred value of 12 k and recalculate
the feedback current as
IFB = 1.25 V/12 k = 104 A
4. R2 = (20 V 1.25 V)/104 A = 180 k
5. I = 23.75 V/180 k 18.75 V/180 k = 28 A
6. RRNG = 5 V/(6 × 28 A) = 30 k
In voltage mode, the circuit operation depends on whether the
maximum output voltage of the DAC exceeds the dc to dc
converter VREF.
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