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參數(shù)資料
| 型號： | AD7864ASZ-3 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 27/28頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT PAR 520K 4CH 44MQFP |
| 標準包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 520k |
| 數(shù)據接口： | 并聯(lián) |
| 轉換器數(shù)目： | 1 |
| 功率耗散（最大）： | 120mW |
| 電壓電源： | 模擬和數(shù)字 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-QFP |
| 供應商設備封裝： | 44-MQFP（10x10） |
| 包裝： | 托盤 |
| 輸入數(shù)目和類型： | 4 個差分，雙極 |
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AD7864
Rev. D | Page 8 of 28
Pin No.
Mnemonic
Description
27
INT/EXT CLK
Internal/External Clock Select Input. When this pin is at Logic 0, the AD7864 uses its internally generated master
clock. When this pin is at Logic 1, the master clock is generated externally to the device.
28
CLKIN
Conversion Clock Input. This is an externally applied clock that allows the user to control the conversion rate of
the AD7864. Each conversion needs 14 clock cycles for the conversion to be completed and an EOC pulse to be
generated. The clock should have a duty cycle that is no worse than 60/40. See the
section.
29 to 34
DB11 to DB6
Data Bit 11 is the MSB, followed by Data Bit 10 to Data Bit 6. Three-state TTL outputs. Output coding is twos
complement for the AD7864-1 and AD7864-3. Output coding is straight (natural) binary for the AD7864-2.
35
DVDD
Positive Supply Voltage for Digital Section, 5.0 V ± 5%. Connect a 0.1 μF decoupling capacitor between this pin
and AGND. Both DVDD and AVDD should be externally tied together.
36
VDRIVE
This pin provides the positive supply voltage for the output drivers (DB0 to DB11), BUSY, EOC, and FRSTDATA. It
is normally tied to DVDD. Decouple VDRIVE with a 0.1 μF capacitor to improve performance when reading during
the conversion sequence. To facilitate interfacing to 3 V processors and DSPs, the output data drivers can also be
powered by a 3 V ± 10% supply.
37
DGND
Digital Ground. This is the ground reference for digital circuitry. Connect this DGND pin to the AGND plane of
the system at the AGND pin.
38, 39
DB5, DB4
Data Bit 5 to Data Bit 4. Three-state TTL outputs.
40 to 43
DB3 to DB0
Data Bit 3 to Data Bit 0. Bidirectional data pins. When a read operation takes place, these pins are three-state TTL
outputs. The channel select register is programmed with the data on the DB0 to DB3 pins with standard CS and
WR signals. DB0 represents Channel 1, and DB3 represents Channel 4.
44
EOC
End-of-Conversion. Active low logic output indicating conversion status. The end of each conversion in a
conversion sequence is indicated by a low-going pulse on this line.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7864ASZ-32 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, Simultaneous Sampling, High Speed, 12-Bit ADC |
| AD7864ASZ-3REEL | 功能描述:IC ADC 12BIT PAR 520K 4CH 44MQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據采集 - 模數(shù)轉換器 系列:- 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7864ASZ-3REEL2 | 制造商:AD 制造商全稱:Analog Devices 功能描述:4-Channel, Simultaneous Sampling, High Speed, 12-Bit ADC |
| AD7864BS-1 | 制造商:Analog Devices 功能描述:ADC Single SAR 520ksps 12-bit Parallel 44-Pin MQFP 制造商:Analog Devices 功能描述:IC 12-BIT ADC |
| AD7864BS-1REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 520ksps 12-bit Parallel 44-Pin MQFP T/R |
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