參數(shù)資料
型號(hào): AD7846KPZ-REEL
廠商: Analog Devices Inc
文件頁數(shù): 9/24頁
文件大?。?/td> 0K
描述: IC DAC 16BIT LC2MOS VOUT 28PLCC
產(chǎn)品培訓(xùn)模塊: Data Converter Fundamentals
DAC Architectures
標(biāo)準(zhǔn)包裝: 750
設(shè)置時(shí)間: 7µs
位數(shù): 16
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
電壓電源: 雙 ±
功率耗散(最大): 100mW
工作溫度: 0°C ~ 70°C
安裝類型: 表面貼裝
封裝/外殼: 28-LCC(J 形引線)
供應(yīng)商設(shè)備封裝: 28-PLCC(11.51x11.51)
包裝: 帶卷 (TR)
輸出數(shù)目和類型: 1 電壓,單極;1 電壓,雙極
采樣率(每秒): 143k
AD7846
Rev. G | Page 17 of 24
DIGITAL FEEDTHROUGH
In the preceding interface configurations, most digital inputs to
the AD7846 are directly connected to the microprocessor bus.
Even when the device is not selected, these inputs are constantly
changing. The high frequency logic activity on the bus can feed
through the DAC package capacitance to show up as noise on
the analog output. To minimize this digital feedthrough, isolate
the DAC from the noise source. Figure 29 shows an interface
circuit that isolates the DAC from the bus.
Note that to make use of the AD7846 readback feature using
the isolation technique of Figure 29, the latch needs to be
bidirectional.
AD7846*
+5V
DATA BUS
CS
LDAC
CLR
MICRO-
PROCESSOR
A1 TO A15
ADDRESS
DECODE
ADDRESS BUS
D0 TO D15
DB0 TO DB15
R/W
74LS245
B BUS
A BUS
DIR
G
08
49
0-
03
1
*LINEAR CIRCUITRY OMITTED FOR CLARITY
Figure 29. AD7846 Interface Circuit Using Latches to Minimize Digital Feedthrough
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