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參數(shù)資料
| 型號： | AD7846KPZ-REEL |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 5/24頁 |
| 文件大小： | 0K |
| 描述： | IC DAC 16BIT LC2MOS VOUT 28PLCC |
| 產(chǎn)品培訓模塊： | Data Converter Fundamentals DAC Architectures |
| 標準包裝： | 750 |
| 設(shè)置時間： | 7µs |
| 位數(shù)： | 16 |
| 數(shù)據(jù)接口： | 并聯(lián) |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 電壓電源： | 雙 ± |
| 功率耗散（最大）： | 100mW |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 28-PLCC（11.51x11.51） |
| 包裝： | 帶卷 (TR) |
| 輸出數(shù)目和類型： | 1 電壓，單極；1 電壓，雙極 |
| 采樣率（每秒）： | 143k |
AD7846
Rev. G | Page 13 of 24
UNIPOLAR BINARY OPERATION
Figure 23 shows the AD7846 in the unipolar binary circuit
configuration. The DAC is driven by the AD586 +5 V reference.
Because RIN is tied to 0 V, the output amplifier has a gain of 2
and the output range is 0 V to +10 V. If a 0 V to +5 V range is
required, RIN should be tied to VOUT, configuring the output
stage for a gain of 1. Table 8 gives the code table for the circuit
of Figure 23.
RIN
VOUT
DGND
+15V
+5V
VCC
VDD
VREF+
VREF–
R1
10k
C1
1F
SIGNAL
GROUND
–15V
*ADDITIONAL PINS
OMITTED FOR CLARITY
AD7846*
AD586
VOUT
(0V TO +10V)
VSS
2
5
4
67
21
5
20
6
4
8
08490
-0
23
Figure 23. Unipolar Binary Operation
Table 8. Code Table for Figure 23
Binary Number in DAC Latch
MSB
LSB1
Analog Output (VOUT)
1111 1111 1111 1111
+10 (65,535/65,536) V
1000 0000 0000 0000
+10 (32,768/65,536) V
0000 0000 0000 0001
+10 (1/65,536) V
0000 0000 0000 0000
0 V
1 LSB = 10 V/216 = 10 V/65,536 = 152 μV.
Offset and gain can be adjusted in Figure 23 as follows:
To adjust offset, disconnect the VREF input from 0 V, load
the DAC with all 0s, and adjust the VREF voltage until VOUT
= 0 V.
For gain adjustment, the AD7846 should be loaded with all
1s and R1 adjusted until VOUT = 10 (65,535)/(65,536) =
9.999847 V. If a simple resistor divider is used to vary the
VREF voltage, it is important that the temperature
coefficients of these resistors match that of the DAC input
resistance (300 ppm/°C). Otherwise, extra offset errors are
introduced over temperature. Many circuits do not require
these offset and gain adjustments. In these circuits, R1 can
be omitted. Pin 5 of the AD586 can be left open circuit and
Pin 8 (VREF) of the AD7846 tied to 0 V.
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