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參數(shù)資料
| 型號(hào)： | AD7819 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 8-Bit Sampling ADC(200kSPS,8位采樣A/D轉(zhuǎn)換器) |
| 中文描述： | 8位采樣ADC（速度高達(dá)200ksps，8位采樣的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 8/12頁 |
| 文件大?。?/td> | 231K |
| 代理商： | AD7819 |
AD7819
Typical Performance Characteristics
–8–
REV. 0
THROUGHPUT – kSPS
P
10
1
0.01
0
50
5
10
15
20
25
30
35
40
45
0.1
Figure 10. Power vs. Throughput
0
–60
–100
d
–10
–50
–70
–90
–30
–40
–80
–20
FREQUENCY – kHz
0
66
7
13
20
27
33
40
47
53
60
AD7819
2048 POINT FFT
SAMPLING 136.054kHz
FIN 29.961kHz
Figure 11. SNR
TIMING AND CONTROL
The AD7819 has only one input for timing and control, i.e.,
the
CONVST
(convert start signal). The rising edge of this
CONVST
signal initiates a 1
μ
s pulse on an internally generated
CONVST
signal. This pulse is present to ensure the part has
enough time to power up before a conversion is initiated. If the
external
CONVST
signal is low, the falling edge of the inter-
nal
CONVST
signal will cause the sampling circuit to go into
hold mode and initiate a conversion. If, however, the external
CONVST
signal is high when the internal
CONVST
goes low,
it is upon the falling edge of the external
CONVST
signal that
the sampling circuitry will go into hold mode and initiate a
conversion. The use of the internally generated 1
μ
s pulse as
previously described can be likened to the configuration shown
in Figure 12. The application of a
CONVST
signal at the
CONVST
pin triggers the generation of a 1
μ
s pulse. Both the
external
CONVST
and this internal
CONVST
are input to an
OR gate. The resultant signal has the duration of the longer of
the two input signals. Once a conversion has been initiated, the
BUSY signal goes high to indicate a conversion is in progress. At
the end of conversion the sampling circuit returns to its track-
ing mode. The end of conversion is indicated by the
BUSY
signal going low. This signal may be used to initiate an ISR on a
microprocessor. At this point the conversion result is latched
into the output register where it may be read. The AD7819 has
an 8-bit wide parallel interface. The state of the external
CONVST
signal at the end of conversion also establishes the mode of
operation of the AD7819.
Mode 1 Operation (High Speed Sampling)
If the external
CONVST
is logic high when BUSY goes low, the
part is said to be in Mode 1 operation. While operating in Mode
1 the AD7819 will not power down between conversions. The
AD7819 should be operated in Mode 1 for high speed sampling
applications, i.e., throughputs greater than 100 kSPS. Figure 13
shows the timing for Mode 1 operation. From this diagram one
can see that a minimum delay of the sum of the conversion time
and read time must be left between two successive falling edges of
the external
CONVST
. This is to ensure that a conversion is not
initiated during a read.
Mode 2 Operation (Automatic Power-Down)
At slower throughput rates the AD7819 may be powered down
between conversion to give a superior power performance.
This is Mode 2 Operation and it is achieved by bringing the
CONVST
signal logic low before the falling edge of BUSY.
Figure 14 shows the timing for Mode 2 Operation. The falling
edge of the external
CONVST
signal may occur before or after
the falling edge of the internal
CONVST
signal, but it is the
later occurring falling edge of both that controls when the first
conversion will take place. If the falling edge of the external
CONVST
occurs after that of the internal
CONVST
, it means
that the moment of the first conversion is controlled exactly,
regardless of any jitter associated with the internal
CONVST
signal. The parallel interface is still fully operational while the
AD7819 is powered down. The AD7819 is powered up again
on the rising edge of the
CONVST
signal. The gated
CONVST
pulse will now remain high long enough for the AD7819 to fully
power up, which takes about 1
μ
s. This is ensured by the
internal
CONVST
signal, which will remain high for 1
μ
s.
1 s
EXT
INT
(PIN 4)
GATED
Figure 12.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AD7819YN | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 8-bit Parallel 16-Pin PDIP 制造商:Analog Devices 功能描述:IC 8BIT ADC 7819 DIP16 |
| AD7819YNZ | 功能描述:IC ADC 8BIT SAMPLING PAR 16-DIP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 其它有關(guān)文件:TSA1204 View All Specifications 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):12 采樣率（每秒）:20M 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:2 功率耗散（最大）:155mW 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:48-TQFP 供應(yīng)商設(shè)備封裝:48-TQFP（7x7） 包裝:Digi-Reel® 輸入數(shù)目和類型:4 個(gè)單端，單極；2 個(gè)差分，單極 產(chǎn)品目錄頁面:1156 (CN2011-ZH PDF) 其它名稱:497-5435-6 |
| AD7819YR | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 8-bit Parallel 16-Pin SOIC N 制造商:Rochester Electronics LLC 功能描述:8 BIT,SINGLE,PARALLEL ADC I.C. - Bulk 制造商:Analog Devices 功能描述:IC SEMICONDUTOR ((NS)) |
| AD7819YR-REEL | 制造商:Analog Devices 功能描述:ADC Single SAR 200ksps 8-bit Parallel 16-Pin SOIC N T/R 制造商:Analog Devices 功能描述:ADC SGL SAR 200KSPS 8BIT PARALLEL 16SOIC N - Tape and Reel |
| AD7819YRREEL7 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-BIT SAMPLING AD CONVERTER |
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