參數(shù)資料
型號(hào): AD7760BSVZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 3/37頁(yè)
文件大?。?/td> 0K
描述: IC ADC 24BIT 2.5MSPS 64TQFP
標(biāo)準(zhǔn)包裝: 1
位數(shù): 24
采樣率(每秒): 2.5M
數(shù)據(jù)接口: 并聯(lián)
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 958mW
電壓電源: 模擬和數(shù)字
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 64-TQFP 裸露焊盤
供應(yīng)商設(shè)備封裝: 64-TQFP-EP(10x10)
包裝: 托盤
輸入數(shù)目和類型: 1 個(gè)差分,單極;1 個(gè)差分,雙極
產(chǎn)品目錄頁(yè)面: 779 (CN2011-ZH PDF)
AD7760
Rev. A | Page 10 of 36
Pin No.
Mnemonic
Description
30
DECAPB
Decoupling Pin. A 33 pF capacitor must be inserted between this pin and AGND3.
17
RBIAS
Bias Current Setting Pin. A resistor must be inserted between this pin and AGND. For more details, see the
45 to 52,
54 to 61
DB15:DB8,
DB7:DB0
16-Bit Bidirectional Data Bus. These are three-state pins that are controlled by the CS pin and the RD/WR
pin. The operating voltage for these pins is determined by the VDRIVE voltage. See the Modulator Data
Output Mode and AD7760 Interface sections for more details.
37
RESET
A falling edge on this pin resets all internal digital circuitry and powers down the part. Holding this pin low
keeps the AD7760 in a reset state.
3
MCLK
Master Clock Input. A low jitter, buffered digital clock must be applied to this pin. The output data rate
depends on the frequency of this clock. See the Clocking the AD7760 section for more details.
2
MCLKGND
Master Clock Ground Sensing Pin.
36
SYNC
Synchronization Input. A falling edge on this pin resets the internal filter. This can be used to synchronize
multiple devices in a system. See the Synchronization section for more details.
39
RD/WR
Read/Write Input. This pin, in conjunction with the chip select pin, is used to read and write data to and
from the AD7760. If this pin is low when CS is low, a read takes place. If this pin is high when CS is low, a
write occurs. See the Modulator Data Output Mode and AD7760 Interface sections for more details.
38
DRDY
Data Ready Output. Each time new conversion data is available, an active low pulse, ICLK period wide, is
produced on this pin. See the Modulator Data Output Mode and AD7760 Interface sections for more details.
40
CS
Chip Select Input. Used in conjunction with the RD/WR pin to read and write data from and to the AD7760.
See the Modulator Data Output Mode and AD7760 Interface sections for more details.
相關(guān)PDF資料
PDF描述
97-3108B-18-11S CONN PLUG RT ANG 5POS W/SOCKETS
AD976ACNZ IC ADC 16BIT 200KSPS 28DIP
SSM2517CBZ-R7 IC AMP AUDIO 2.4W MONO D 9WLCSP
UP050B151K-NAC CAP CER 150PF 50V 10% AXIAL
VE-B00-MX-F3 CONVERTER MOD DC/DC 5V 75W
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
AD7760BSVZ-REEL 功能描述:IC ADC 24BIT 2.5MSPS 64TQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 位數(shù):14 采樣率(每秒):83k 數(shù)據(jù)接口:串行,并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散(最大):95mW 電壓電源:雙 ± 工作溫度:0°C ~ 70°C 安裝類型:通孔 封裝/外殼:28-DIP(0.600",15.24mm) 供應(yīng)商設(shè)備封裝:28-PDIP 包裝:管件 輸入數(shù)目和類型:1 個(gè)單端,雙極
AD7761BSTZ 功能描述:16 Bit Analog to Digital Converter 8 Input 8 Sigma-Delta 64-LQFP (10x10) 制造商:analog devices inc. 系列:- 包裝:托盤 零件狀態(tài):有效 位數(shù):16 采樣率(每秒):256k 輸入數(shù):8 輸入類型:差分 數(shù)據(jù)接口:SPI 配置:ADC 無(wú)線電 - S/H:ADC:- A/D 轉(zhuǎn)換器數(shù):8 架構(gòu):三角積分 參考類型:外部 電壓 - 電源,模擬:2 V ~ 5.5 V 電壓 - 電源,數(shù)字:- 特性:同步采樣 工作溫度:-40°C ~ 105°C 封裝/外殼:64-LQFP 供應(yīng)商器件封裝:64-LQFP(10x10) 標(biāo)準(zhǔn)包裝:1
AD7761BSTZ-RL 功能描述:16 Bit Analog to Digital Converter 8 Input 8 Sigma-Delta 64-LQFP (10x10) 制造商:analog devices inc. 系列:- 包裝:帶卷(TR) 零件狀態(tài):有效 位數(shù):16 采樣率(每秒):256k 輸入數(shù):8 輸入類型:差分 數(shù)據(jù)接口:SPI 配置:ADC 無(wú)線電 - S/H:ADC:- A/D 轉(zhuǎn)換器數(shù):8 架構(gòu):三角積分 參考類型:外部 電壓 - 電源,模擬:2 V ~ 5.5 V 電壓 - 電源,數(shù)字:- 特性:同步采樣 工作溫度:-40°C ~ 105°C 封裝/外殼:64-LQFP 供應(yīng)商器件封裝:64-LQFP(10x10) 標(biāo)準(zhǔn)包裝:1,500
AD7762 制造商:AD 制造商全稱:Analog Devices 功能描述:24-Bit, 8.5 mW, 109 dB, 128/64/32 kSPS ADCs
AD77628SVZ 制造商:Analog Devices 功能描述: