參數(shù)資料
型號(hào)： AD7760BSVZ-REEL
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 13/37頁(yè)
文件大?。?/td> 0K
描述： IC ADC 24BIT 2.5MSPS 64TQFP
標(biāo)準(zhǔn)包裝： 1,500
位數(shù)： 24
采樣率（每秒）： 2.5M
數(shù)據(jù)接口： 并聯(lián)
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 958mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-TQFP 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 64-TQFP-EP（10x10）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 1 個(gè)差分，單極；1 個(gè)差分，雙極
AD7760
Rev. A | Page 19 of 36
MODULATOR DATA OUTPUT MODE
Operating the AD7760 in modulator output mode enables the
output of data directly from the Σ-Δ modulator. This mode of
operation bypasses the AD7760 on-board digital filtering
capabilities, outputting data in its unfiltered form.
As discussed in the Theory of Operation section, the AD7760
operates using oversampling, which spreads quantization noise
over a wide bandwidth. The decrease in the quantization noise
energy in the resulting signal band is illustrated in Figure 40a.
By coupling the use of oversampling with the use of a high
order, multibit Σ-Δ modulator, the AD7760 further reduces the
quantization noise in the signal band. Figure 41 is an FFT of
unfiltered data output from the AD7760 when it is used in
modulator output mode. This clearly demonstrates the shaping
of the quantization noise performed by the AD7760’s Σ-Δ
modulator.
MODULATOR INPUTS
The maximum voltage input to each differential modulator
input pin is 0.8 × 4.096 V ≈ 3.275 V (80% of VREF), which must
sit on a common mode of VREF/2. This maximum differential
input voltage is shown as the conditioned output of the AD7760’s
on-board differential amplifier in Figure 52 in the Driving the
AD7760 section.
Further details on the signal conditioning implemented by the
AD7760’s on-board differential amplifier and the recommended
external circuitry that accompanies it is described in the
0
–160
01
FREQUENCY (MHz)
A
M
P
L
IT
UDE
(
d
B)
0
–10
–20
–30
–40
–50
–60
–70
–80
–90
–100
–110
–120
–130
–140
–150
12
34
567
89
049
75
-04
8
Figure 41. FFT of Data Output by the AD7760 in Modulator Output Mode
MODULATOR DATA OUTPUT SCALING
In modulator output mode, data is output in a 16-bit twos
complement format on Pins D [15:0]; however, this data is
scaled to 15 bits. The transfer function in Figure 42 shows the
scaling involved for the 16 data bits output from Modulator
Pins D[15:0] vs. the maximum differential voltage input
allowed for the modulator inputs (VIN+ and VIN).
D[15:0]
0011 0011 0011 0010
0011 1111 1111 1111
0000 0000 0000 0000
1100 1100 1100 1100
1100 0000 0000 0000
+4.096V
–4.096V
VIN+ = 3.6855V
VIN– = 0.4105V
+3.275V = MODULATOR FULL SCALE = 80% OF +4.096V
80% OF +4.096V = MODULATOR FULL SCALE = –3.275V
VIN+=2.048V
VIN– = 2.048V
VIN+ = 0.4105V
VIN– = 3.6855V
04
975
-04
9
Figure 42. Modulator Output Data Scaling
As the nature of the modulator output is coarse relative to
the fully filtered output of the AD7760 (due to the associated
quantization noise of the modulator output), Bits D[3:0] of the
modulator output are zero when operating in modulator data
output mode. Thus, the data outputs for the calculations listed
in Example 1 and Example 2 for inputs to the modulator pins
VIN+ and VIN show Bits D[3:0] of the modulator output as zero.
Example 1
VIN+ = 3.5 V
VIN = 0.595 V
Modulator Output Code = ([VIN(+) VIN()]/4.096 V) × 16384
= [(3.5 V 0.595 V)/4.096 V] × 16384
= +11620
Direct Scaling: [0010 1101 0110 0100]
Value Output on Data Output Pins D[15:0]:
D [15:0] = [0010 1101 0110 0000].
Example 2
VIN+ = 0.595 V
VIN = 3.5 V
Modulator Output Code = ([VIN(+) VIN()]/4.096 V) × 16384
= [(0.595 V 3.5 V)/4.096 V] × 16384
= 11620
Direct Scaling: [1101 0010 1001 1100]
Value Output on Data Output Pins D[15:0]:
D [15:0] = [1101 0010 1001 0000].
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