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參數(shù)資料
| 型號： | AD775 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | 8-Bit 20 MSPS, 60 mW Sampling A/D Converter(8位,20MSPS 60mW采樣A/D轉(zhuǎn)換器) |
| 中文描述： | 8位20 MSPS的60毫瓦采樣A / D轉(zhuǎn)換器（8位，20MSPS 60mW的采樣的A / D轉(zhuǎn)換器） |
| 文件頁數(shù)： | 10/12頁 |
| 文件大小： | 343K |
| 代理商： | AD775 |
AD775
REV. 0
–10–
T able I. Components List
Reference Designator
Description
Quantity
R1, R2, R14
R3, R15
R4, R13, R16
R5, R10
R6–R9
R11
R12
CR1
C1, C2, C5, C6, C9, C12–C15, C18
C20, C22, C23
C3, C4
C7
C8
C11, C16, C19, C21
Q1
U1
U2
U3
U4
U5
U6
U7
J1, J8
Potentiometer
Resistor, 1%, 499
Resistor, 1%, 49.9
Resistor, 1%, 20
Resistor, 1%, 10 k
Resistor, 1%, 75
Resistor, 1%, 4.99 k
Diode, 1N4148
3
2
3
2
4
1
1
1
Ceramic Cap, Z5U, 0.1
μ
F
Capacitor, Mica, 390 pF
Capacitor, Mica, 10 pF
Capacitor, T antalum, 22
μ
F, 16 V
Capacitor, Alum. Electrolytic, 47
μ
F, 16 V
T ransistor, 2N3904
AD680JT
AD822AN
AD817AN
78M05
AD775
74ALS541N
74HC04N
BNC Jack
13
2
1
1
4
1
1
1
1
1
1
1
1
2
V
RT
and V
RB
. Note that the V
RT
and V
RB
traces (see Figures 19
and 20) are run in parallel and in the same proximity. Any noise
coupling is likely to be common mode to both signals and would
result in an offset error but not a gain error. T he entire reference
circuit is powered by a single +5 V supply. T he minimum volt-
age for V
RB
is determined by the impedance of the AD822 out-
put stage and the amount of current flowing through the
internal resistor ladder of the AD775.
T he sampling clock is buffered by U7, a 74HC04 inverter. It is
recommended that the output loading of the inverter is mini-
mized in order to maintain fast transition times on the clock. An
additional inverter is used to provide a buffered clock signal
whose rising edges indicate that data is valid. A 74AL S541
buffers the eight digital data outputs of the AD775 to improve
the load driving capability.
T he multilayer PCB board layout shows some of the important
design guidelines recommended for the AD775. T he most im-
portant aspect is the power and ground distribution. While the
AD775 has separate analog and digital power and ground pins,
the AD775 should be treated as an entirely analog component.
T he ground plane is joined close to the ADC in order to main-
tain a low potential difference across the analog and digital
ground pins. Because the power and grounds are derived from a
common point, a slit in the ground plane is used to minimize
any interaction between the analog and digital return currents.
T he power for the AD775, AV
DD
and DV
DD
, are derived from
the same supply. Separate traces are run to AV
DD
and DV
DD
and joined together at the source. While not used on the evalua-
tion board, a ferrite bead or inductor can effectively isolate noise
generated by digital circuitry such as the output buffers. In cases
where only a single supply is available, the inductor should not
be placed between AV
DD
and DV
DD
. Instead, both supplies of
the AD775 should be connected together and isolated from
entirely digital components.
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相關(guān)代理商/技術(shù)參數(shù) |
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| AD7750 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Product-to-Frequency Converter |
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| AD7750AN | 制造商:Analog Devices 功能描述:SEMICONDUCTOR ((NW)) |
| AD7750AR | 制造商:Rochester Electronics LLC 功能描述:PRODUCT TO FREQUENCY CONVERTER I.C. - Bulk |
| AD7750AR-REEL | 制造商:Analog Devices 功能描述: |
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