
==99-10-14==
P&S
ooá|′μ×ó1é· YóDT1
==46-10==
P &S
oo á|′μ×ó1é· YóDT1
μ :
ot±±ooêD×μèa· 15o
D :
ooêD70020D
óê±à:
430079
μ°:
( 86) ( 027£87493500 87493506
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( 86) ( 027) 87491166, 87493497
P &S
í í :
http://www.p8s.com
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11. V
REF
=REFIN
£¨
+
££-
REFIN
£¨£-££
12.
óDúóμ¥
CMOS
oóê±£aDê3μêêóóú
MCLK OUT
£
13.
aáè· ±£òD£ù ú
+25
è2aê £
14.
°éùμá÷ ±òú £
2. 2. 3 AD7714μìD
£¨
AV
DD
=+3.3V
á
+5V
£
DV
DD
=+3.3V
á
+5V
£
REFIN
£¨
+
£
=+1.25V
£¨
AD7714-3
£ò
+2.5V
£¨
AD7714-5
£
REFIN
£¨£-£
=AGND
£3y· áí óDμ÷
MCLK IN=1MHz
á
2.4576MHz
£3y· áí óDμ÷£ùóDìDμè·
§ùa
T
MIN
á
T
MAX
££
Parameter
A Versions
Units
Conditions/Comments
TRANSDUCER BURNOUT
14
Current
Initial Tolerance
Drift
1
10
0.1
A nom
% typ
%/ C typ
SYSTEM CALIBRATION
Positive Full-Scale Calibration Limit
15
Negative Full-Scale Calibration Limit
15
(1.05 V
REF
)/GAIN
Offset Calibration Limit
16
Input Span
16
(1.05 V
REF
)/GAIN
V max
V max
V max
V min
V max
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
GAIN Is the Selected PGA Gain (Between 1 and 128)
(1.05 V
)/GAIN
0.8 V
REF
/GAIN
(2.1 V
REF
)/GAIN
POWER REQUIREMENTS
Power Supply Voltages
AV
DD
Voltage (AD7714-3)
AV
DD
Voltage (AD7714-5)
DV
Voltage
Power Supply Currents
AV
DD
Current
+3 to +3.6
+4.75 to +5.25
+3 to +5.25
V
V
V
For Specified Performance
For Specified Performance
For Specified Performance
AV
DD
= 3.3 V or 5 V. BST Bit of Filter High Register = 0
17
Typically 0.2 mA. BUFFER = 0 V. f
CLK IN
= 1 MHz or 2.4576 MHz
Typically 0.4 mA. BUFFER = DV
= 1 MHz or 2.4576 MHz
AV
DD
= 3.3 V or 5 V. BST Bit of Filter High Register = 1
17
Typically 0.3 mA. BUFFER = 0 V. f
CLK IN
= 2.4576 MHz
Typically 0.8 mA. BUFFER = DV
= 2.4576 MHz
Digital I/Ps = 0 V or DV
DD.
External MCLK IN
Typically 0.15 mA. DV
DD
= 3.3 V. f
CLK IN
= 1 MHz
Typically 0.3 mA. DV
DD
= 5 V. f
CLK IN
Typically 0.4 mA. DV
DD
= 3.3 V. f
CLK IN
= 2.4576 MHz
Typically 0.6 mA. DV
DD
= 5 V. f
CLK IN
= 2.4576 MHz
0.27
0.6
mA max
mA max
0.5
1.1
mA max
mA max
DV
DD
Current
18
0.23
0.4
0.5
0.8
See Note 20
mA max
mA max
mA max
mA max
dB typ
Power Supply Rejection
19
Normal-Mode Power Dissipation
18
AV
DD
= DV
DD
= +3.3 V. Digital I/Ps = 0 V or DV
DD
. External MCLK IN
Typically 1.25 mW. BUFFER = 0 V. f
CLK IN
= 1 MHz. BST Bit = 0
Typically 1.8 mW. BUFFER = +3.3 V. f
CLK IN
= 1 MHz. BST Bit = 0
Typically 2 mW. BUFFER = 0 V. f
CLK IN
= 2.4576 MHz. BST Bit = 0
Typically 2.6 mW. BUFFER = +3.3 V. f
CLK IN
= 2.4576 MHz. BST Bit = 0
AV
DD
= DV
DD
= +5 V. Digital I/Ps = 0 V or DV
DD
. External MCLK IN
Typically 2.5 mW. BUFFER = 0 V. f
CLK IN
= 1 MHz. BST Bit = 0
Typically 3.5 mW. BUFFER = +5 V. f
CLK IN
= 1 MHz. BST Bit = 0
Typically 4 mW. BUFFER = 0 V. f
CLK IN
= 2.4576 MHz. BST Bit = 0
Typically 5 mW. BUFFER = +5 V. f
CLK IN
= 2.4576 MHz. BST Bit = 0
External MCLK IN = 0 V or DV
DD
. Typically 20 A. V
DD
= +5 V
External MCLK IN = 0 V or DV
DD
. Typically 5 A. V
DD
= +3.3 V
1.65
2.75
2.55
3.65
mW max
mW max
mW max
mW max
Normal-Mode Power Dissipation
3.35
5
5.35
7
40
10
mW max
mW max
mW max
mW max
A max
A max
Standby Power-Down) Current
21
Standby Power-Down) Current
21
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0
£
16.
ùè£aêèμμ1231y
AV
DD
+30mV
ò±μ±è
AGND
£-
30mV
ü o£′éê1óa(chǎn)DD£