參數(shù)資料
型號： AD7707BRU
廠商： Analog Devices Inc
文件頁數(shù)： 41/52頁
文件大小： 0K
描述： IC ADC 16BIT 3CH 20-TSSOP
標準包裝： 75
位數(shù)： 16
采樣率（每秒）： 500
數(shù)據(jù)接口： DSP，MICROWIRE?，QSPI?，串行，SPI?
轉(zhuǎn)換器數(shù)目： 1
功率耗散（最大）： 1mW
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 20-TSSOP（0.173"，4.40mm 寬）
供應商設備封裝： 20-TSSOP
包裝： 管件
輸入數(shù)目和類型： 1 個單端，單極；1 個單端，雙極；2 個偽差分，單極；2 個偽差分，雙極
AD7707
Rev. B | Page 46 of 52
CHART RECORDERS
Another area where both high and low level input channels are
usually found is in chart recorder applications. Circular chart
recorders generally have two requirements. The first utilizes the
low level input channels of the AD7707 to measure inputs from
thermocouples, RTDs, and pressure sensors. The second
requirement is to be able to measure dc input voltage ranges up
to ±10 V. The high level input channel is ideally suited to this
measurement because there is no external signal conditioning
required to accommodate these high level input signals.
ACCOMMODATING VARIOUS HIGH LEVEL INPUT
RANGES
The high level input channel, AIN3 can accommodate input
signals from 11 V to +30 V on its input. This is achieved using
on-chip thin film resistors that map the signal on AIN3 into a
usable range for the AD7707. The input structure is arranged so
that the Σ-Δ converter sees the same impedance at its AIN(+)
and AIN() inputs. The signal on the AIN3 input is referenced
to the HICOM input and the VBIAS signal is used to adjust the
common-mode voltage at the modulator input. In normal 5 V
operation, VBIAS is normally connected to 2.5 V and HICOM
is connected to AGND. This arrangement ensures that the
voltages seen at the modulator input are within the common-
mode range of the buffer.
The differential voltage, AIN, seen by the AD7707 when using
the high level input channel is the difference between AIN3(+)
and AIN3(), as shown in Figure 31, and must remain within
the absolute common-mode range of the modulator.
AIN3(+) = (AIN3 + 6 × VBIAS+ VHICOM)/8
AIN3() = 0.75 × VBIAS + 0.25 VHICOM
AIN = (AIN3 VHICOM)/8
AIN
5k
30k
15k
5k
AIN3
VBIAS
HICOM
AIN3(+)
AIN3(–)
30k
MUX
08
69
1-
03
1
Figure 31. AIN3, High Level Input Channel Structure
The VBIAS and HICOM inputs are used to tailor the input
range on the high level input channel to suit a variety of input
ranges. Table 28 applies for operation with AVDD = 5 V, and
REF(+) REF() = 2.5 V. Table 29 applies for operation with
AVDD = 3 V, and REF(+) REF() = 1.25 V.
TYPICAL INPUT CURRENTS
When using the high level input channel, power dissipation is
determined by the currents flowing in the AIN3, VBIAS, and
HICOM inputs. The voltage level applied to these inputs
determines whether the external source driving these inputs
needs to sink or source current. Table 30 shows the currents
associated with the ±10 V input range. These inputs should be
driven from a low impedance source in all applications to
prevent significant gain errors being introduced.
Table 28. Configuration of AD7707 vs. Input Range on AIN3 (AVDD = 5 V, VREF = 2.5 V)
AIN3 Range
VBIAS
HICOM
Gain
Buffered/Unbuffered
AIN Range
±10 V
2.5 V
AGND
2
Buffered/Unbuffered
1.875 V ± 1.25 V
±5 V
2.5 V
AGND
4
Buffered/Unbuffered
1.875 V ± 0.625 V
0 V to 10 V
2.5 V
AGND
2
Buffered/Unbuffered
1.875 V to 3.125 V
0 V to 20 V
AGND
1
Buffered
0 V to 2.5 V
2.5 V
AGND
1
Buffered
1.875 V to 4.375 V
5 V to +10 V
2.5 V
2
Buffered/Unbuffered
2.5 V ± 0.9375 V
Table 29. Configuration of AD7707 vs. Input Range on AIN3 (AVDD = 3 V, VREF = 1.25 V)
AIN3 Range
VBIAS
HICOM
Gain
BUF/UNBUF
AIN Range
±5 V
1.25 V
AGND
2
Unbuffered
0.9375 V ± 0.625 V
0 V to 10 V
1.25 V
AGND
1
Unbuffered
0.9375 V to 2.1875 V
5 V to +10 V
1.25 V
2.5 V
1
Unbuffered
1.5625 V ± 0.9375 V
7.5 V to +10 V
1.25 V
0 V
1
Unbuffered
0 V to 2.1875 V
±10 V
1.666 V
AGND
1
Unbuffered
1.25 V ± 1.25 V
Table 30. Typical Input Current vs. Voltage on AIN3
AIN3
VBIAS
HICOM
I (AIN3)
I (VBIAS)
I (HICOM)
10 V
2.5 V
AGND
354 μA
500 μA
146 μA
0 V
2.5 V
AGND
62 μA
250 μA
188 μA
+10 V
2.5 V
AGND
229 μA
0 μA
229 μA
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