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參數(shù)資料
| 型號： | AD7654ASTRL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | ADC |
| 英文描述： | Dual 2-Channel Simultaneous Sampling SAR 500 kSPS 16-Bit ADC |
| 中文描述： | 4-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, SERIAL/PARALLEL ACCESS, PQFP48 |
| 封裝： | MS-026-BBC, LQFP-48 |
| 文件頁數(shù)： | 14/24頁 |
| 文件大小： | 734K |
| 代理商： | AD7654ASTRL |
REV. 0
–14–
AD7654
The noise generated by the driver amplifier needs to be kept
as low as possible to preserve the SNR and transition noise
performance of the AD7654. The noise coming from the
driver is filtered by the AD7654 analog input circuit one-pole
low-pass filter made by R
A
, R
B
, and C
S
. The SNR degrada-
tion due to the amplifier is:
SNR
f
N e
LOSS
dB
N
=
+
(
)
20
56
56
2
2
3
2
log
–
π
where:
f
–3
dB
is the –3 dB input bandwidth in MHz of the AD7654
(10 MHz) or the cutoff frequency of the input filter if any is
used.
N
is the noise factor of the amplifier (1 if in buffer configu-
ration).
e
N
is the equivalent input noise voltage of the op amp in
nV/
√
Hz
1/2
.
For instance, a driver with an equivalent input noise of
2 nV/
√
Hz
like the AD8021 and configured as a buffer, thus
with a noise gain of +1, will degrade the SNR by only 0.03 dB
with the filter in Figure 5, and 0.09 dB without.
The driver needs to have a THD performance suitable to
that of the AD7654.
The AD8021 meets these requirements and is usually appropri-
ate for almost all applications. The AD8021 needs an external
compensation capacitor of 10 pF. This capacitor should have
good linearity as an NPO ceramic or mica type.
The AD8022 could be used where a dual version is needed and
a gain of 1 is used.
The AD829 is another alternative where high frequency (above
100 kHz) performance is not required. In a gain of 1, it requires
an 82 pF compensation capacitor.
The AD8610 is another option where low bias current is needed
in low frequency applications.
Voltage Reference Input
The AD7654 requires an external 2.5 V reference. The reference
input should be applied to REFA and REFB. The voltage refer-
ence input REF of the AD7654 has a dynamic input impedance;
it should therefore be driven by a low impedance source with an
efficient decoupling. This decoupling depends on the choice of
the voltage reference but usually consists of a 1
μ
F ceramic
capacitor and a low ESR tantalum capacitor connected to the
REFA, REFB, and REFGND inputs with minimum parasitic
inductance. 47
μ
F is an appropriate value for the tantalum
capacitor when using one of the recommended reference voltages:
The low noise, low temperature drift AD780 voltage
reference
The low cost AD1582 voltage reference
For applications using multiple AD7654s, it is more effective to
buffer the reference voltage using the internal buffer. Each ADC
should be decoupled individually.
Care should be taken with the reference temperature coefficient
of the voltage reference, which directly affects the full-scale
accuracy if this parameter is applicable. For instance, a
±
15 ppm/
°
C tempco of the reference changes the full-scale
accuracy by
±
1 LSB/
°
C.
Power Supply
The AD7654 uses three sets of power supply pins: an analog 5 V
supply AVDD, a digital 5 V core supply DVDD, and a digital
input/output interface supply OVDD. The OVDD supply
allows direct interface with any logic working between 2.7 V and
DVDD + 0.3 V. To reduce the number of supplies needed, the
digital core (DVDD) can be supplied through a simple RC filter
from the analog supply, as shown in Figure 5. The AD7654 is
independent of power supply sequencing, once OVDD does not
exceed DVDD by more than 0.3 V, and thus free from supply
voltage induced latchup. Additionally, it is very insensitive to
power supply variations over a wide frequency range, as shown
in Figure 6.
FREQUENCY – kHz
401
10
P
100
1000
10000
45
50
55
60
65
70
Figure 6. PSRR vs. Frequency
POWER DISSIPATION
In Impulse Mode, the AD7654 automatically reduces its power
consumption at the end of each conversion phase. During the
acquisition phase, the operating currents are very low, which
allows significant power savings when the conversion rate is
reduced, as shown in Figure 7. This feature makes the AD7654
ideal for very low power battery applications.
It should be noted that the digital interface remains active even
during the acquisition phase. To reduce the operating digital
supply currents even further, the digital inputs need to be driven
close to the power rails (i.e., DVDD and DGND), and OVDD
should not exceed DVDD by more than 0.3 V.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AD7654ASTZ | 功能描述:IC ADC 16BIT 500KSPS DUAL 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:PulSAR® 標準包裝:1 系列:microPOWER™ 位數(shù):8 采樣率（每秒）:1M 數(shù)據(jù)接口:串行，SPI? 轉換器數(shù)目:1 功率耗散（最大）:- 電壓電源:模擬和數(shù)字 工作溫度:-40°C ~ 125°C 安裝類型:表面貼裝 封裝/外殼:24-VFQFN 裸露焊盤 供應商設備封裝:24-VQFN 裸露焊盤（4x4） 包裝:Digi-Reel® 輸入數(shù)目和類型:8 個單端，單極 產品目錄頁面:892 (CN2011-ZH PDF) 其它名稱:296-25851-6 |
| AD7654ASTZ | 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7654 LQFP48 |
| AD7654ASTZRL | 功能描述:IC ADC 16BIT DUAL 2CH 48LQFP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉換器 系列:PulSAR® 標準包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應商設備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個單端，單極；1 個單端，雙極 |
| AD7655 | 制造商:AD 制造商全稱:Analog Devices 功能描述:14-Bit, 1 MSPS, Differential, Programmable Input PulSAR ADC |
| AD7655ACP | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 16-bit Parallel/Serial 48-Pin LFCSP EP 制造商:Rochester Electronics LLC 功能描述:LOW COST 4-CHANNEL 1 MSPS 16-BIT ADC - Bulk 制造商:Analog Devices 功能描述:IC 16BIT ADC SMD 7655 LFSCP-48 |
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