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參數(shù)資料
| 型號： | AD7568 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Octal 12-Bit DAC(LC2MOS八通道12位D/A轉換器) |
| 中文描述： | 八通道12位DAC（LC2MOS八通道12位的D / A轉換器） |
| 文件頁數(shù)： | 9/12頁 |
| 文件大小： | 251K |
| 代理商： | AD7568 |
AD7568
REV. B
–9–
Current Mode Circuit
In the current mode circuit of Figure 17, I
OUT 2
, and hence
I
OUT 1
, is biased positive by an amount V
BIAS
. For the circuit to
operate correctly, the DAC ladder termination resistor must be
connected internally to I
OUT 2
. T his is the case with the AD7568.
T he output voltage is given by:
(
V
OUT
=
D
R
FB
R
DAC
BIAS
V
IN
)
{
}
+
V
BIAS
As D varies from 0 to 4095/4096, the output voltage varies from
V
OUT
= V
BIAS
to V
OUT
= 2 V
BIAS
– V
IN
. V
BIAS
should be a low
impedance source capable of sinking and sourcing all possible
variations in current at the I
OUT 2
terminal without any
problems.
Voltage Mode Circuit
Figure 18 shows DAC A of the AD7568 operating in the
voltage-switching mode. T he reference voltage, V
IN
is applied to
the I
OUT 1
pin, I
OUT 2
is connected to AGND and the output volt-
age is available at the V
REF
terminal. In this configuration, a
positive reference voltage results in a positive output voltage
making single supply operation possible. T he output from the
DAC is a voltage at a constant impedance (the DAC ladder re-
sistance). T hus, an op amp is necessary to buffer the output
voltage. T he reference voltage input no longer sees a constant
input impedance, but one which varies with code. So, the volt-
age input should be driven from a low impedance source.
It is important to note that V
IN
is limited to low voltages be-
cause the switches in the DAC no longer have the same source-
drain voltage. As a result, their on-resistance differs and this
degrades the integral linearity of the DAC. Also, V
IN
must not
go negative by more than 0.3 volts or an internal diode will turn
on, causing possible damage to the device. T his means that the
full-range multiplying capability of the DAC is lost.
DAC A
A1
I A
I A
AD7568
V
OUT
R A
V A
V
IN
NOTES
1) ONLY ONE DAC IS SHOWN FOR CLARITY.
2) DIGITAL INPUT CONNECTIONS ARE OMITTED.
3) C1 PHASE COMPENSATION (5–15pF) MAY BE
REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.
R1
R2
Figure 18. Single Supply Voltage Switching
Mode Operation
APPLIC AT IONS
Programmable State Variable Filter
T he AD7568 with its multiplying capability and fast settling
time is ideal for many types of signal conditioning applications.
T he circuit of Figure 19 shows its use in a state variable filter
design. T his type of filter has three outputs: low pass, high pass
and bandpass. T he particular version shown in Figure 19 uses
one half of an AD7568 to control the critical parameters f
0
, Q
and A
0
. Instead of several fixed resistors, the circuit uses the
DAC equivalent resistances as circuit elements. T hus, R1 in
Figure 19 is controlled by the 12-bit digital word loaded to
DAC A of the AD7568. T his is also the case with R2, R3 and
R4. T he fixed resistor R5 is the feedback resistor, R
FB
B.
DAC Equivalent Resistance, R
EQ
= (R
LADDER
3
4096)/N
where:
R
LADDER
is the DAC ladder resistance.
N is the DAC Digital Code in Decimal (0 < N < 4096).
DAC A
(R1)
DAC B
(R2)
1/2 x AD7568
A1
A1
R8 30k
HIGH
PASS
OUTPUT
DAC C
(R3)
I A
I C
R B
V B
V
IN
I B
V C
DAC D
(R4)
C3 10pF
C1 1000pF
R7 30k
C1 1000pF
LOW
PASS
OUTPUT
BAND
PASS
OUTPUT
V A
I C
I B
I A
I D
V D
I D
A2
A3
R6
10k
NOTES
1. A1, A2, A3, A4: 1/4 x AD713
2. DIGITAL INPUT CONNECTIONS ARE OMITTED.
3. C3 IS A COMPENSATION CAPACITOR TO ELIMINATE
Q AND GAIN VARIATIONS CAUSED BY AMPLIFIER GAIN
BANDWIDTH LIMITATIONS.
Figure 19. Programmable 2nd Order State Variable Filter
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