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參數(shù)資料
| 型號(hào)： | AD7485 |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 1 MSPS, Serial 14-Bit SAR ADC |
| 中文描述： | 1 MSPS的，串行14位SAR ADC |
| 文件頁(yè)數(shù)： | 10/16頁(yè) |
| 文件大?。?/td> | 769K |
| 代理商： | AD7485 |
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REV. 0
–10–
AD7485
Figure 7 shows the AD7485 conversion sequence operating in
normal mode.
2 s
960ns
1.04 s
READ DATA
CONVERSION
FINISHED
CONVST
TFS
Figure 7. Normal Mode Power Dissipation
In NAP mode, all the internal circuitry except for the internal
reference is powered down. In this mode, the power dissipation
of the AD7485 is reduced to 3 mW. When exiting NAP mode,
a minimum of 300 ns when using an external reference must be
waited before initiating a conversion. This is necessary to allow
the internal circuitry to settle after power-up and for the track/hold
to properly acquire the analog input signal.
If the AD7485 is put into NAP mode after each conversion, the
average power dissipation will be reduced but the throughput
rate will be limited by the power-up time. Using the AD7485 with
a throughput rate of 100 kSPS while placing the part in NAP
mode after each conversion would result in average power dissi-
pation as follows:
The power-up phase contributes:
(
The conversion phase contributes:
(
While in NAP mode for the rest of the cycle, the AD7485 dissipates
only 2.185 mW of power.
(
Thus the power dissipated during each cycle is:
300
10
/
5
12
1 8
.
ns
s
V
mA
mW
)
×
×
(
)
=
960
10
/
5
16
7 68
.
ns
s
V
mA
mW
)
×
×
(
)
=
8 74
10
/
s
5
0 6
.
2 622
.
.
s
V
mA
mW
)
×
×
(
)
=
1 8
7 68
.
2 622
.
12 1
.
.
mW
mW
mW
mW
+
+
+
Figure 8 shows the AD7485 conversion sequence if putting the
part into NAP mode after each conversion.
1.26 s
10 s
8.74 s
300ns
CONVST
NAP
TFS
Figure 8. NAP Mode Power Dissipation
Figures 9 and 10 show a typical graphical representation of
power versus throughput for the AD7485 when in normal and
NAP modes, respectively.
THROUGHPUT – kSPS
80
76
0
100
P
72
68
64
60
200
400
300
500
600
700
800
900
1000
78
74
70
66
62
Figure 9. Normal Mode, Power vs. Throughput
THROUGHPUT – kSPS
50
40
0
50
P
30
20
10
0
100
200
150
250
300
350
400
450
500
45
35
25
15
5
Figure 10. NAP Mode, Power vs. Throughput
In STANDBY mode, all the internal circuitry is powered down
and the power consumption of the AD7485 is reduced to 10
μ
W.
Because the internal reference has been powered down, the
power-up time necessary before a conversion can be initiated is
longer. If using the internal reference of the AD7485, the ADC
must be brought out of STANDBY mode 500 ms before a conver-
sion is initiated. Initiating a conversion before the required
power-up time has elapsed will result in incorrect conversion
data. If an external reference source is used and kept powered up
while the AD7485 is in STANDBY mode, the power-up time
required will be reduced to 80
μ
s.
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