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參數(shù)資料
| 型號(hào)： | AD7451ARTZ-REEL7 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 6/25頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC ADC 12BIT DIFF 1MSPS SOT23-8 |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 位數(shù)： | 12 |
| 采樣率（每秒）： | 1M |
| 數(shù)據(jù)接口： | DSP，MICROWIRE?，QSPI?，串行，SPI? |
| 轉(zhuǎn)換器數(shù)目： | 1 |
| 功率耗散（最大）： | 9.25mW |
| 電壓電源： | 單電源 |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | SOT-23-8 |
| 供應(yīng)商設(shè)備封裝： | SOT-23-8 |
| 包裝： | 標(biāo)準(zhǔn)包裝 |
| 輸入數(shù)目和類型： | 1 個(gè)偽差分，單極 |
| 其它名稱： | AD7451ARTZ-REEL7DKR |
AD7441/AD7451
Rev. D | Page 13 of 24
THEORY OF OPERATION
CIRCUIT INFORMATION
The AD7441/AD7451 are 10-/12-bit, high speed, low power,
single-supply, successive approximation, analog-to-digital con-
verters (ADCs) with a pseudo differential analog input. These
parts operate with a single 2.7 V to 5.25 V power supply and are
capable of throughput rates up to 1 MSPS when supplied with
an 18 MHz SCLK. The AD7441/AD7451 require an external
reference to be applied to the VREF pin.
The AD7441/AD7451 have a SAR ADC, an on-chip differential
track-and-hold amplifier, and a serial interface housed in either
an 8-lead SOT-23 or an MSOP package. The serial clock input
accesses data from the part and provides the clock source for
the SAR ADC. The AD7441/AD7451 feature a power-down
option for reduced power consumption between conversions.
The power-down feature is implemented across the standard
serial interface, as described in the Modes of Operation section.
CONVERTER OPERATION
The AD7441/AD7451 are SAR ADCs based around two
schematics of the ADC in the acquisition and conversion phase,
respectively. The ADC is comprised of control logic, an SAR,
and two capacitive DACs. In Figure 19 (acquisition phase), SW3
is closed, SW1 and SW2 are in Position A, the comparator is
held in a balanced condition, and the sampling capacitor arrays
acquire the differential signal on the input.
VIN+
VIN–
A
B
SW1
SW3
COMPARATOR
CONTROL
LOGIC
CAPACITIVE
DAC
CAPACITIVE
DAC
CS
VREF
SW2
B
A
03
15
3-
0
19
Figure 19. ADC Acquisition Phase
When the ADC starts a conversion (see Figure 20), SW3 opens
and SW1 and SW2 move to Position B, causing the comparator
to become unbalanced. Both inputs are disconnected once the
conversion begins. The control logic and the charge redistribu-
tion DACs are used to add and subtract fixed amounts of charge
from the sampling capacitor arrays to bring the comparator
back into a balanced condition. When the comparator is rebal-
anced, the conversion is complete. The control logic generates
the ADC output code. The output impedances of the sources
driving the VIN+ and VIN– pins must be matched; otherwise the
two inputs have different settling times, resulting in errors.
VIN+
VIN–
A
B
SW1
SW3
COMPARATOR
CONTROL
LOGIC
CAPACITIVE
DAC
CAPACITIVE
DAC
CS
VREF
SW2
B
A
03
15
3-
0
20
Figure 20. ADC Conversion Phase
ADC TRANSFER FUNCTION
The output coding for the AD7441/AD7451 is straight (natural)
binary. The designed code transitions occur at successive LSB
values (1 LSB, 2 LSB, and so on). The LSB size of the AD7451
is VREF/4096, and the LSB size of the AD7441 is VREF/1024. The
ideal transfer characteristic of the AD7441/AD7451 is shown in
000...000
0V
A
D
C
CO
DE
ANALOG INPUT
111...111
000...001
111...000
011...111
111...110
000...010
1LSB = VREF/4096 (AD7451)
1LSB = VREF/1024 (AD7441)
VREF – 1LSB
1LSB
03
15
3-
0
21
Figure 21. AD7441/AD7451 Ideal Transfer Characteristic
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| AD7451BRM | 制造商:Analog Devices 功能描述:ADC Single SAR 1Msps 12-bit Serial 8-Pin MSOP 制造商:Analog Devices 功能描述:12BIT SAR ADC DIFF I/P SMD 7451 |
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| AD7451BRMZ | 功能描述:IC ADC 12BIT DIFF 1MSPS 8MSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模數(shù)轉(zhuǎn)換器 系列:- 標(biāo)準(zhǔn)包裝:1,000 系列:- 位數(shù):12 采樣率（每秒）:300k 數(shù)據(jù)接口:并聯(lián) 轉(zhuǎn)換器數(shù)目:1 功率耗散（最大）:75mW 電壓電源:單電源 工作溫度:0°C ~ 70°C 安裝類型:表面貼裝 封裝/外殼:24-SOIC（0.295"，7.50mm 寬） 供應(yīng)商設(shè)備封裝:24-SOIC 包裝:帶卷 (TR) 輸入數(shù)目和類型:1 個(gè)單端，單極；1 個(gè)單端，雙極 |
| AD7451BRMZ | 制造商:Analog Devices 功能描述:12BIT SAR ADC DIFF I/P SMD 7451 |
| AD7451BRT | 制造商:AD 制造商全稱:Analog Devices 功能描述:Pseudo Differential, 1MSPS, 12- & 10-Bit ADCs in 8-lead SOT-23 |
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